7 Commits

Author	SHA1	Message	Date
SalimTerryLi	29accf2533	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one ... Note: on ESP32 UART rxfifo seems to be read as u8 instead of u32 to make it work	2021-10-12 10:42:04 +08:00
Wangjialin	427fe1bcde	uart: fix esp32c3 uart output garbage value after resetting	2021-07-21 15:31:50 +08:00
Marius Vikhammer	38aa99d63d	soc: merge C3 caps into a single soc_caps.h	2021-05-11 15:20:54 +08:00
Michael (XIAO Xufeng)	7dca6b7428	uart: fixed incorrect baudrate on C3 and S3 when target is too slow ... The integer part of the divider is only 12-bit now. We used prescaler to get low frequency instead.	2021-03-10 13:41:10 +08:00
Li Shuai	a43de3a44b	fix set UART_FORCE_XOFF can't stop new Tx request issue	2021-01-19 14:51:22 +08:00
Armando	d393699ab6	uart: bringup on esp32c3	2020-11-30 15:23:15 +11:00
Angus Gratton	7c08be5771	hal: Add initial ESP32-C3 support ... From internal commit 7761d6e8	2020-11-30 15:23:15 +11:00