6 Commits

Author	SHA1	Message	Date
wuzhenghui	1e11f287e1	change(esp_hw_support): disable CPU wait-for-event mode on cpu start	2025-02-18 19:21:09 +08:00
Omar Chebib	f06b235709	fix(riscv): fix a that affected mintstatus CSR value in the CLIC	2024-07-26 13:56:40 +08:00
laokaiyao	21f870ecd5	remove(c5beta3): remove c5 beta3 system files	2024-06-17 12:02:15 +08:00
Marius Vikhammer	4b4f4c200a	fix(interrupt): fixed interrupt thresholds not working on C5	2024-05-14 10:56:22 +08:00
Omar Chebib	f6e935e013	fix(esp32c5): add CLIC interrupt controller support for the ESP32-C5	2024-04-16 10:38:14 +08:00
Omar Chebib	102d5bbf72	refactor(riscv): added a new API for the interrupts	2024-01-18 16:36:53 +08:00