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c84757d35e80f646ab1b98da072ffab44016e425
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27 Commits

Author SHA1 Message Date
wuzhenghui
c84757d35e fix(esp_hw_support): fix current leakage if ext32k slow clock source not exists 2025-04-08 20:07:47 +08:00
laokaiyao
ecb52d3af3 refactor(i2s): rename the confusing port number 2024-10-23 18:16:57 +08:00
Xiao Xufeng
5b71b949be fix(startup): move rtc initialization before MSPI timing tuning to improve stability 2024-06-18 01:16:24 +08:00
morris
8e64a59fac refactor(periph_ctrl): remove orphaned clk_gate_ll.h 
and deprecate the legacy periph_module_xxx functions for new targets
 2024-03-29 10:53:05 +08:00
Konstantin Kondrashov
3f89072af1 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
liuning
3fa9c578f9 fix(clk): clear all lpclk source at clk init 2024-02-07 13:49:18 +08:00
Marius Vikhammer
06850e0e1e refactor(system): removed esp_system from astyle ignore list and reformated it 2024-01-30 15:17:15 +08:00
Cao Sen Miao
6768805d20 fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions, 
Closes https://github.com/espressif/esp-idf/issues/12958
 2024-01-18 10:51:51 +08:00
morris
71cf16ec01 feat(gptimer): use RCC atomic block to enable/reset peripheral 2023-08-22 17:05:35 +08:00
Gustavo Henrique Nihei
3cbac3dd1d esp_system: Ensure TIMG0 clock is always enabled during normal operation 
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-06 04:58:11 +00:00
jingli
60c1811433 esp_hw_support/clk_cali: remove redundant check for cali value 2022-09-21 03:03:25 +00:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces 
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
 2022-07-22 00:06:06 +08:00
Ivan Grokhotkov
a22730c914 esp_system: fix garbled UART output on startup on esp32s2 
Closes https://github.com/espressif/esp-idf/issues/9168
 2022-06-17 12:09:07 +02:00
songruojing
03477a59db rtc_clk: Fix rtc8m calibration failure after cpu/core reset 
1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
 2022-06-13 17:47:51 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in 
soc/clk_tree_defs.h
 2022-05-24 22:59:41 +08:00
Marius Vikhammer
d2872095f9 soc: moved kconfig options out of the target component. 
Moved the following kconfig options out of the target component:
 * CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
 * ESP*_REV_MIN -> esp_hw_support
 * ESP*_TIME_SYSCALL -> newlib
 * ESP*_RTC_* -> esp_hw_support

Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
 2022-04-21 12:09:43 +08:00
songruojing
c1dedb33fa esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset 2022-02-09 15:54:34 +08:00
Cao Sen Miao
eddc196081 esp_clk: refactor target/clk.h to private/esp_clk.h 2021-11-26 14:56:30 +08:00
morris
16677b0d3c global: make periph enable/disable APIs private 
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
 2021-11-08 10:37:47 +08:00
Angus Gratton
bbbbd5cf0c esp32s2: FPGA can boot to Hello World 2021-07-16 10:50:06 +10:00
morris
1560d6f1ba soc: add reset reasons in soc component 2021-07-13 10:45:38 +08:00
Renz Bagaporo
cb5a8342d4 esp_system: revert reset of systimer clk at startup 2021-03-25 15:37:48 +08:00
Angus Gratton
d6f4d99d93 core system: Fix warnings in compilation when assertions are disabled 
Adds a CI config for hello world that sets this, to catch future regressions
 2021-03-03 10:26:57 +11:00
Renz Bagaporo
2dc7b556f3 esp32s2: reset systimer clk on startup 2021-01-22 14:51:50 +08:00
KonstantinKondrashov
dada7cd035 global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
Renz Bagaporo
4cc6b5571b esp_system: support riscv panic 2020-11-13 07:49:11 +11:00