Wu Zheng Hui
cceadc4ce8
Merge branch 'fix/fix_ota_slowclock_switching' into 'master'
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fix(esp_hw_support): fix rtc slow clock missing after the OTA app changes the slow clock source
Closes IDF-11424
See merge request espressif/esp-idf!34416
2024-10-29 21:49:03 +08:00
wuzhenghui
7fdfa6c227
fix(esp_hw_support): disable unused clock sources after rtc clock switching complete
2024-10-28 15:57:26 +08:00
laokaiyao
ecb52d3af3
refactor(i2s): rename the confusing port number
2024-10-23 18:16:57 +08:00
wuzhenghui
04b2afed44
change(esp_hw_support): switch lp_cpu power mode with clock src to save lp_cpu working power
2024-09-26 11:23:06 +08:00
Marius Vikhammer
00eb97725b
feat(system): support choosing xtal as rtc-fast clock src on P4 and C5
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With xtal as rtc-fast clock source the LP-Core can run at twice the default
clock frequency. 40 MHz as opposed to 20 MHz.
2024-09-19 17:30:44 +08:00
Song Ruo Jing
6db52ffe12
remove(clk): rc32k is removed as a clk source option for lp_slow_clk on C5/C61
2024-07-31 22:41:23 +08:00
Song Ruo Jing
40f3bc2e57
feat(clk): Add basic clock support for esp32c5 mp
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- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
2024-06-26 14:26:34 +08:00
Xiao Xufeng
5b71b949be
fix(startup): move rtc initialization before MSPI timing tuning to improve stability
2024-06-18 01:16:24 +08:00
laokaiyao
21f870ecd5
remove(c5beta3): remove c5 beta3 system files
2024-06-17 12:02:15 +08:00
Song Ruo Jing
ac6101bf4e
feat(clk): support ESP32C5 XTAL 40M/48M selection
2024-06-11 17:42:43 +08:00
Lou Tianhao
3fb4909483
feat(example): support esp32c5 timer/gpio/uart wakeup
2024-04-10 11:45:04 +08:00
Marius Vikhammer
1c73c657c9
Merge branch 'ci/console_test_coverage' into 'master'
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ci(console): improve esp-system console test-coverage
Closes IDFCI-1856, IDF-9576, and IDF-9577
See merge request espressif/esp-idf!29748
2024-03-28 11:14:57 +08:00
Marius Vikhammer
42fc463c81
fix(console): fixed CONSOLE_NONE not working on C2/C3
2024-03-26 13:39:10 +08:00
Mahavir Jain
cdc1a2551b
Merge branch 'feature/enable_rsa_support_for_c5' into 'master'
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feat: enable RSA support for c5
See merge request espressif/esp-idf!29189
2024-03-22 10:10:47 +08:00
nilesh.kale
b11f286555
feat(esp_system/esp32c5): revised cypto clock to be used
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This commit updated crypto clock to use 160M SPLL clock
2024-03-19 13:47:04 +05:30
laokaiyao
24d6dcb829
feat(esp32c5mp): add system related components
2024-03-18 17:34:56 +08:00
Konstantin Kondrashov
3f89072af1
feat(all): Use PRIx macro in all logs
2024-03-12 11:15:53 +02:00
liuning
3fa9c578f9
fix(clk): clear all lpclk source at clk init
2024-02-07 13:49:18 +08:00
Marius Vikhammer
06850e0e1e
refactor(system): removed esp_system from astyle ignore list and reformated it
2024-01-30 15:17:15 +08:00
Song Ruo Jing
cf93777077
refactor(rtc): move soc/rtc.h from soc to esp_hw_support component
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Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
2024-01-25 19:15:33 +08:00
Cao Sen Miao
6768805d20
fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions,
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Closes https://github.com/espressif/esp-idf/issues/12958
2024-01-18 10:51:51 +08:00
laokaiyao
a48f4760d2
feat(esp32c5): add system related supports
2024-01-02 11:17:11 +08:00
