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2127 Commits

Author SHA1 Message Date
morris
3fc84fdbca Merge branch 'fix/usb-hal-dwc-host-channel-num_v5.3' into 'release/v5.3' 
fix(usb/hal/dwc): Correct host channel number calculation (backport v5.3)

See merge request espressif/esp-idf!37373
 2025-04-16 10:21:29 +08:00
morris
3f9d5cac2a Merge branch 'bugfix/clear_ledc_gamma_ram_v5.3' into 'release/v5.3' 
fix(ledc): left-off gamma ram registers should be cleared (v5.3)

See merge request espressif/esp-idf!37573
 2025-04-16 10:19:51 +08:00
morris
7c447b5525 Merge branch 'bugfix/gpio_dump_io_config_v5.3' into 'release/v5.3' 
fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32 (v5.3)

See merge request espressif/esp-idf!37909
 2025-04-16 10:17:44 +08:00
morris
13cf4ba87c Merge branch 'bugfix/sdmmc_high_prio_timeout_v5.3' into 'release/v5.3' 
fix(sdmmc): move DMA descriptor refilling into the ISR (v5.3)

See merge request espressif/esp-idf!37688
 2025-04-15 14:47:50 +08:00
morris
5ad0818c9f Merge branch 'refactor/ana_cmpr_driver_v5.3' into 'release/v5.3' 
refactor(ana_cmpr): enhanced the driver implementation (v5.3)

See merge request espressif/esp-idf!38389
 2025-04-15 10:57:27 +08:00
morris
3816f5f281 Merge branch 'fix/parlio_add_gdma_fifo_reset_v5.3' into 'release/v5.3' 
fix(parlio_tx): add clock and fifo reset in disable function (v5.3)

See merge request espressif/esp-idf!36274
 2025-04-15 10:47:25 +08:00
morris
cff4d595e5 Merge branch 'fix/jpeg_decoder_collective_backport_v5.3' into 'release/v5.3' 
fix(jpeg_decoder): JPEG Decoder collective backport to v5.3

See merge request espressif/esp-idf!37508
 2025-04-15 10:24:04 +08:00
Marius Vikhammer
6d8f288bbc Merge branch 'bugfix/p4_lpwdt_efuse_v5.3' into 'release/v5.3' 
fix(lpwdt): P4 LP-WDT now takes into account the EFUSE_WDT_DELAY for the timeout (v5.3)

See merge request espressif/esp-idf!38393
 2025-04-15 10:22:09 +08:00
morris
5a3ef8e515 Merge branch 'contrib/github_pr_15484_v5.3' into 'release/v5.3' 
fix(twai): fixed twai assert fail during recover (GitHub PR) (v5.3)

See merge request espressif/esp-idf!37989
 2025-04-15 10:20:15 +08:00
morris
8bb21fda7c Merge branch 'feat/enable_l2mem_burst_buffer_mode_v5.3' into 'release/v5.3' 
improve AXI-ICM QoS function (v5.3)

See merge request espressif/esp-idf!37469
 2025-04-15 10:10:52 +08:00
Marius Vikhammer
c15953acee fix(lpwdt): P4 LP-WDT now takes into account the EFUSE_WDT_DELAY forthe timeout 2025-04-14 14:52:23 +08:00
morris
f4968da7ce fix(ana_cmpr): ETM event not work for Unit 1 2025-04-14 14:42:21 +08:00
diplfranzhoepfinger
1d7d24b160 fix(twai): fixed twai assert fail when recover 
driver try start new frame in ISR however already bus off

Closes https://github.com/espressif/esp-idf/issues/9697
 2025-04-10 20:07:16 +08:00
Renze Nicolai
cb7cdb315e fix: add missing break statements to usb_serial_jtag_ll_phy_select, 
Closes https://github.com/espressif/esp-idf/pull/15499
 2025-03-31 10:39:18 +08:00
Song Ruo Jing
0077f642df fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access 2025-03-20 17:09:36 +08:00
Song Ruo Jing
47f1a2c81b fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32 
Closes https://github.com/espressif/esp-idf/issues/14931
 2025-03-20 17:09:28 +08:00
morris
8a1c9e3cfa fix(axi_icm): qos can be applied to read and write independently 2025-03-12 21:37:29 +08:00
Ivan Grokhotkov
f824a827dc fix(sdmmc): move DMA descriptor refilling into the ISR 
Previously, as DMA descriptors were processed, the task performing
SDMMC transfer would get woken up and would refill the descriptors.
This design didn't work correctly when higher priority tasks occupied
the CPU for too long, resulting in SDMMC transfer timing out.

This change moves DMA descriptor refilling into SDMMC ISR. Now the
"DMA done" interrupt is delivered back to task context only when
the entire transfer is completed.

Closes https://github.com/espressif/esp-idf/issues/13934
 2025-03-12 13:06:57 +08:00
Song Ruo Jing
0ced5fbd21 fix(ledc): overflowed integer argument in ledc_hal_clear_left_off_fade_param 2025-03-07 20:30:20 +08:00
igor.masar
e0679b5ba0 fix(usb/hal/dwc): Correct host channel number calculation 
The hardware field `ghwcfg2.numhstchnl` is zero-based, meaning the actual
number of available host channels is `numhstchnl + 1`. This off-by-one
error caused the USB Host controller to report N-1 channels instead of N,
leading to premature "No more HCD channels available" errors when
connecting multiple devices.

This issue affects ESP32-S2, ESP32-S3, and ESP32-P4.
 2025-03-07 18:30:44 +08:00
peter.marcisovsky
3e8d088748 fix(jpeg_decoder): Correctly handle invalid 0xffff JPEG marker 2025-03-07 10:30:10 +01:00
Song Ruo Jing
d173affef0 fix(ledc): left-off gamma ram registers should be cleared 
Hardware reads in (range_number+1) fade parameter registers, which could
cause output waveform error.
 2025-03-07 17:30:05 +08:00
Jiang Jiang Jian
5f18a9711b Merge branch 'feature/esp32h2_eco5_ecc_v5.3' into 'release/v5.3' 
feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 (v5.3)

See merge request espressif/esp-idf!36585
 2025-02-28 10:50:18 +08:00
Chen Jichang
25f35910a7 fix(parlio): fix rempty interrupt during resetting fifo 
Move the fifo reset to after disabling the tx core clock.
And add external non-free running clock src test.
 2025-02-27 15:12:33 +08:00
Aditya Patwardhan
2390e81fb7 fix(hal): Fixed ecc_ll for esp32c5 beta3 2025-02-26 17:04:28 +05:30
Aditya Patwardhan
78874d7f7c feat(docs): Update minimizing binary size 
The ESP32-H2 software countermeasure may not be necessary
        for ESP32-H2 v1.2 and above, this commit updates
        the relevant documentation
 2025-02-26 17:04:28 +05:30
Aditya Patwardhan
08e250d081 fix(soc): Fixed ECDSA register compatibility 2025-02-26 17:04:27 +05:30
Aditya Patwardhan
68eb689b35 fix(hal): Make the ECDSA countermeasure dynamically applicable 
This commit makes the ECDSA countermeasure dynamically applicable
    across different revisions of the ESP32H2 SoC.
 2025-02-26 17:04:19 +05:30
Chen Jichang
1ff5e64acd fix(parlio_tx): add clock and fifo reset in disable function 2025-02-26 18:41:49 +08:00
morris
67c6ae91ab Merge branch 'feat/allow_setting_rmt_group_prescale_v5.3' into 'release/v5.3' 
refactor(rmt): set group clock prescale dynamically (v5.3)

See merge request espressif/esp-idf!36738
 2025-02-26 17:03:16 +08:00
Chen Jichang
e98ded4e7b refactor(rmt): set group clock prescale dynamically 
Closes https://github.com/espressif/esp-idf/issues/14760
 2025-02-26 11:22:51 +08:00
Martin Vychodil
2c26a7e11e fix(security): Fixed ESP32S2 memory protection check for Peri1 RTCSLOW interrupt 
- fixes the issue found in https://github.com/espressif/esp-idf/issues/15359
- extends debug printouts in the related tests
 2025-02-21 16:29:04 +08:00
Jiang Jiang Jian
fed7e38609 Merge branch 'fix/esp32p4_lightsleep_fixes_v5.3' into 'release/v5.3' 
fix(esp_hw_support): some fixes of esp32p4 lightsleep retention & power switch process (v5.3)

See merge request espressif/esp-idf!37097
 2025-02-21 11:03:20 +08:00
wuzhenghui
1f6d8d4e5d fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management 2025-02-20 19:39:02 +08:00
morris
03a2fca29d Merge branch 'feature/flash_software_resume_v5.3' into 'release/v5.3' 
feat(spi_flash): Add config for adding auto check status after suspend to improve performance (backport v5.3)

See merge request espressif/esp-idf!36526
 2025-02-20 11:01:11 +08:00
Mahavir Jain
e97c51ea24 feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5 2025-02-19 19:15:17 +05:30
wuzhenghui
7147d7b366 change(esp_hw_support): wrapper sleep dcdc/ldo ops with ll 2025-02-19 21:37:38 +08:00
Armando
e1ea5ee810 fix(mmu): fixed esp_mmu_vaddr_to_paddr cannot figure out psram vaddr issue on esp32p4 2025-02-19 14:07:47 +08:00
Shu Chen
9b00dff1b9 Merge branch 'support/ieee802154_get_rssi_comp_from_phy_v5.3' into 'release/v5.3' 
feat(802.15.4): support ieee802154 get rssi comp from phylib (v5.3)

See merge request espressif/esp-idf!37052
 2025-02-19 11:03:40 +08:00
morris
85cf4c262b Merge branch 'fix/adc_func_register_not_reset_issue_v5.3' into 'release/v5.3' 
adc: func register not reset issue (v5.3)

See merge request espressif/esp-idf!37046
 2025-02-19 10:33:33 +08:00
Island
f258a14894 Merge branch 'bugfix/h2_ble_timer_clk_enable_fix_v5.3' into 'release/v5.3' 
fix: H2 ble timer clk enable issue. (v5.3)

See merge request espressif/esp-idf!36544
 2025-02-18 15:45:38 +08:00
zwx
c1adbead0c feat(802.15.4): use btbb function to get rssi comp for h2 2025-02-18 12:10:24 +08:00
Armando
aad78c3022 fix(adc): fixed adc function register not reset issue 2025-02-18 10:35:59 +08:00
Geng Yuchao
d418167af1 fix(esp32h2): H2 ble timer clk enable issue 2025-02-07 11:46:27 +08:00
Tomas Rezucha
56620eb23b fix(usb/host): Set SCHED_INFO for all channels 
Although the hardware documentation suggests that SCHED_INFO is only used
for periodic channels, empirical evidence shows that omitting this configuration
on non-periodic channels can cause them to freeze.
Therefore, we set this field for all channels to ensure reliable operation.
 2025-02-06 08:18:04 +01:00
Tomas Rezucha
47577b83c5 fix(usb/host): Fixed Full Speed periodic transfers on ESP32-P4 
For FS periodic endpoints 'tokens_per_frame' must be set to 8
LL usb_dwc_ll_hctsiz_set_sched_info() function.
 2025-01-27 08:07:30 +01:00
Mahavir Jain
e1a023e13d Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.3' into 'release/v5.3' 
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.3)

See merge request espressif/esp-idf!36464
 2025-01-24 14:40:00 +08:00
morris
8f20eac2df Merge branch 'feat/spi_std_timing_and_bit_trans_v5.3' into 'release/v5.3' 
feat(driver_spi): support adjust master rx to standard timing (v5.3)

See merge request espressif/esp-idf!36400
 2025-01-24 10:24:14 +08:00
harshal.patil
ac0dc0d775 feat(bootloader_support): Permanently enable XTS-AES pseudo rounds when FE release mode is enabled 2025-01-23 14:06:16 +05:30
harshal.patil
ae4e693cfc feat(hal/spi_flash_encrypted): Enable pseudo rounds function during XTS-AES operations 2025-01-23 14:06:16 +05:30