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830 Commits

Author SHA1 Message Date
Jiang Jiang Jian
ddb9f5d9dc Merge branch 'fix/fix_mspi_write_stuck_after_reset_v5.5' into 'release/v5.5' 
fix(esp_system): fix mspi write stuck after cpu/digital reset on c5/c61 (v5.5)

See merge request espressif/esp-idf!43732
 2025-12-04 10:34:56 +08:00
wuzhenghui
104145de7f fix(esp_system): fix mspi write stuck after cpu/digital reset on c5/c61 2025-12-02 13:34:17 +08:00
gaoxu
dfef29c007 feat(rng): support P4 ECO5 TRNG 2025-12-01 15:31:44 +08:00
gaoxu
94679d0b0e refactor(rng): refactor to use hal/ll apis for P4 2025-12-01 15:31:44 +08:00
Song Ruo Jing
fb20e147d5 fix(console): release default console UART pins if console is switched in bootloader 
Also print out console UART pin number in app cpu_startup stage

Closes https://github.com/espressif/esp-idf/issues/16764
Closes https://github.com/espressif/esp-idf/issues/17459
 2025-11-21 22:11:25 +08:00
wuzhenghui
3ee348fe52 fix(esp_hw_support): add p4 rev3.0 MSPI workaround for deepsleep 2025-10-30 19:09:44 +08:00
Mahavir Jain
042f29dd66 Merge branch 'fix/change_write_protection_bit_of_shared_security_efuses_v5.5' into 'release/v5.5' 
Reorder write protection bits of some shared security efuses (v5.5)

See merge request espressif/esp-idf!42033
 2025-10-15 09:38:59 +05:30
armando
e6d4eec507 feat(p4): p4 rev3 real chip support 2025-10-13 15:25:23 +08:00
harshal.patil
175a6510f5 fix(bootloader_support): Allow pre-programmed XTS-AES psuedo round level efuses 
- The API esp_flash_encryption_set_release_mode() by defualt programs
the XTS-AES pseudo round level efuse to level low but did not considered
any existing value that would have been programmed in the efuse bit.
 2025-10-13 10:40:16 +05:30
harshal.patil
70a8b4d842 fix(bootloader_support): Reorder write disabling ECDSA_CURVE_MODE 2025-10-13 10:40:16 +05:30
harshal.patil
d902072d80 fix(bootloader_support): Reorder write protection bits of some shared security efuses 2025-10-13 10:40:16 +05:30
Mahavir Jain
b0713ffe08 fix(bootloader): correct encryption length for secure update without secure boot 
For secure update without secure boot case, the encryption length for
app image must consider signature block length as well. This was
correctly handled for secure boot case but not for secure update without
secure boot.
 2025-09-16 10:16:37 +05:30
harshal.patil
476f8f6f51 feat(bootloader_support): Support Secure Boot using ECDSA-P384 curve 2025-07-25 14:25:31 +05:30
harshal.patil
55f693d4dd change(bootloader_support/secure_boot): Allow NULL as verified_digest for app build 
The esp_secure_boot_verify_sbv2_signature_block() and esp_secure_boot_verify_rsa_signature_block()
APIs need and use the verified_digest argument only for BOOTLOADER_BUILD, but the argument is
not used in the application code, and the value present in verified_digest is considered invalid.
Thus, allow passing NULL as the verified_digest parameter to help some save space.
 2025-07-25 14:23:02 +05:30
harshal.patil
1b3eb8f93e fix(bootloader_support/secure_boot): Fix incorrect usage of ESP_SECURE_BOOT_KEY_DIGEST_LEN 2025-07-25 14:23:02 +05:30
Aditya Patwardhan
a002a04332 feat(soc): Added soc capabilities related to RNG 2025-07-23 18:24:46 +05:30
Jiang Jiang Jian
3c39b32195 Chip/support esp32c61 v5.5 2025-07-22 12:21:36 +08:00
Omar Chebib
20ec15edff fix(esp_system): fix RTC reserved area alignment in the linker script 
Make sure the size of the RTC reserved area complies with the alignment requirement.

Closes https://github.com/espressif/esp-idf/issues/13082
 2025-06-18 20:11:47 +08:00
nilesh.kale
2d5d7b819f feat: enabled ECDSA-P192 support for ESP32H2 2025-06-16 13:13:03 +08:00
chaijie@espressif.com
45fb5fb793 fix(pmu): fix deepsleep current too big bug for esp32c61 2025-05-20 21:14:33 +08:00
chaijie@espressif.com
63f72f659d feat(power_glich): support power_glitch of esp32c5_eco1 and above, eco32c61 eco2 and above 2025-05-20 21:14:33 +08:00
Mahavir Jain
37e28522c2 fix: secure OTA without secure boot issue for MMU page size configurable SoCs 
For secure app verification during OTA update case, the image was
getting memory mapped twice and hence the failure in verification.

Modified from memory mapped flash read to SPI flash read approach
for the MMU page size from image header.

Regression from 07318a4987

Closes https://github.com/espressif/esp-idf/issues/15936
 2025-05-14 10:53:46 +05:30
Laukik Hase
8a999ea19e fix(security): Set all APM masters to operate in TEE mode by default 2025-05-11 10:01:11 +05:30
Laukik Hase
41bf07e6ce refactor(esp_tee): Remove the deprecated TEE secure storage partition subtype 2025-05-04 18:03:30 +05:30
armando
755fd86b6f fix(bootloader): fixed image cannot exceed 16MB issue 
flash 32-bit-addr is an experimental feature that has multiple
dependencies, e.g. flash chip vendor, etc.

If CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH can be enabled
successfully and tests are passed, we can allow images to be
placed on higher-than-16MB flash addresses
 2025-04-29 15:42:27 +08:00
Mahavir Jain
f7724eedef Merge branch 'feature/enable_secure_boot_for_esp32h21' into 'master' 
feat: enable secure boot support for esp32h21

Closes IDF-11500 and IDF-12161

See merge request espressif/esp-idf!36618
 2025-04-28 11:37:37 +08:00
nilesh.kale
c65858287a feat: enabled secure boot support esp32h21 2025-04-25 17:48:25 +05:30
gaoxu
66bed18464 feat(rng): add regi2c control ref_count 2025-04-25 14:39:12 +08:00
gaoxu
bf335a38f7 fix(adc): fix adc do not enable/disable regi2c registers 2025-04-25 14:39:01 +08:00
Sudeep Mohanty
80910be77a fix(lp-timer): Remove LP Timer interrupt disabling from bootloader 
This commit removes the disabling of the LP Timer interrupt from the
bootloader clock configuration routine. This allows the LP Timer
interrupt to be visible to the LP Core after HP CPU boots up.

Closes https://github.com/espressif/esp-idf/issues/15751
 2025-04-16 16:31:57 +02:00
nilesh.kale
54eb749fd2 feat: updated check for chip revision and respective testcases 
This commit have updated check for max chip revision along with min chip revision.
Also added qemu based pytest to verify chip revision while performing OTA.
 2025-04-07 18:18:16 +08:00
Mahavir Jain
574d2eebd7 Merge branch 'fix/bootloader_sha_handle_memory_leak' into 'master' 
fix(bootloader_support): Fix sha handle memory leak when returning error

Closes IDF-12735

See merge request espressif/esp-idf!38058
 2025-03-27 17:05:06 +08:00
Gao Xu
3157356157 Merge branch 'refactor/rng_ll_c5' into 'master' 
refactor(rng): refactor to use hal/ll apis for c5

Closes IDF-12534

See merge request espressif/esp-idf!37601
 2025-03-27 15:31:01 +08:00
harshal.patil
4edd6c1f6d fix(bootloader_support): Fix sha handle memory leak when returning error 2025-03-27 09:18:30 +05:30
gaoxu
32b7347965 feat(rng): add comment of reserved channel in RNG 2025-03-26 14:52:59 +08:00
gaoxu
09dbbe4452 refactor(rng): refactor to use hal/ll apis for c5 2025-03-23 17:07:30 +08:00
harshal.patil
a02dec09ca refactor(bootloader_support): Unify bootloader_sha layer 2025-03-21 16:37:20 +05:30
Chen Ji Chang
6474fd67ae Merge branch 'feat/h4_introduce_step8' into 'master' 
feat(esp32h4): introduce hello world to ESP32H4 (stage8)

Closes IDF-9526 and IDF-12333

See merge request espressif/esp-idf!37545
 2025-03-20 16:16:05 +08:00
Gao Xu
728f95f498 Merge branch 'refactor/rng_ll_c6' into 'master' 
refactor(rng): refactor to use hal/ll apis for c6

Closes IDF-12533

See merge request espressif/esp-idf!37319
 2025-03-20 10:28:39 +08:00
Chen Jichang
45ba78940f feat(esp32h4): finnal introduce hello world 2025-03-19 18:48:41 +08:00
Chen Jichang
9fd0f634d2 fix(bootloader): use ESP_EARLY_LOG before console is ready 2025-03-17 18:53:28 +08:00
gaoxu
675fe44f1e refactor(rng): rename/merge some adc_ll functions 2025-03-17 11:52:18 +08:00
gaoxu
e6c2259b44 refactor(rng): refactor to use hal/ll apis for c6 2025-03-17 11:42:29 +08:00
nilesh.kale
652879ff06 feat: enable flash encryption support for esp32h21 2025-03-13 10:37:11 +05:30
harshal.patil
a6ea9bcd41 fix(secure_boot): Fix SB verification failure when sig block and key digest mismatch 
- Secure boot V2 verification failed when multiple keys are used to sign the bootloader
  and the application is signed with a key other than the first key that is used to
  sign the bootloader.
- The issue was introduced as a regression from the commit `ff16ce43`.
- Added a QEMU test for recreating the issue.
- Made SECURE_BOOT_FLASH_BOOTLOADER_DEFAULT independent of SECURE_BOOT_BUILD_SIGNED_BINARIES.
 2025-03-04 11:26:51 +05:30
Mahavir Jain
3821d6cb97 fix(esp_tee): TEE otadata partition default encrypted for flash-enc case 2025-03-03 15:50:47 +08:00
Song Ruo Jing
a4a28b57a3 feat(gdma): add GDMA support for ESP32H21 2025-02-25 17:05:48 +08:00
Armando
c7ee2d7157 refactor(pmu): replace regi2c registers with LL APIs 2025-02-24 11:16:48 +08:00
Armando
d598c9db7c refactor(rng): refactor to use hal/ll apis for c61 2025-02-24 11:16:48 +08:00
Armando
df202585e6 refactor(rng): refactor to use hal/ll apis for h2 2025-02-13 09:40:05 +08:00