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1476 Commits

Author SHA1 Message Date
Jiang Jiang Jian
b5944c8f34 Merge branch 'feature/iram_esp_system_v5.5' into 'release/v5.5' 
feat(esp_system): Adds Kconfigs to place code in IRAM (v5.5)

See merge request espressif/esp-idf!40516
 2025-07-25 19:45:26 +08:00
Konstantin Kondrashov
e72ea712e7 feat(esp_system): Adds Kconfigs to place code in IRAM 2025-07-24 00:34:58 +08:00
Aditya Patwardhan
a002a04332 feat(soc): Added soc capabilities related to RNG 2025-07-23 18:24:46 +05:30
Jiang Jiang Jian
0291ab0dfb Merge branch 'feature/support_chip912_pvt_auto_dbias_360m_backport_v5.5' into 'release/v5.5' 
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4_backport_v5.5

See merge request espressif/esp-idf!40676
 2025-07-22 17:36:09 +08:00
Jiang Jiang Jian
e2d5f85804 Merge branch 'feat/call_start_in_flash_v5.5' into 'release/v5.5' 
esp_system: move call_start_cpu* into flash to save IRAM (v5.5)

See merge request espressif/esp-idf!39926
 2025-07-22 14:38:14 +08:00
Jiang Jiang Jian
3c39b32195 Chip/support esp32c61 v5.5 2025-07-22 12:21:36 +08:00
yanzihan@espressif.com
3d3731965c feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4 2025-07-18 09:54:31 +08:00
wuzhenghui
c844ba4f7f fix(esp_system): force enable uart0 sclk in esp_restart 2025-07-03 19:13:41 +08:00
Omar Chebib
20ec15edff fix(esp_system): fix RTC reserved area alignment in the linker script 
Make sure the size of the RTC reserved area complies with the alignment requirement.

Closes https://github.com/espressif/esp-idf/issues/13082
 2025-06-18 20:11:47 +08:00
Michael (XIAO Xufeng)
e1faf670b2 feat(hw_support): move call_start_cpu0 into flash to save IRAM 2025-06-17 15:11:36 +08:00
Jiang Jiang Jian
cd7c97e6eb Merge branch 'disable_esp32c61_test_v5.5' into 'release/v5.5' 
ci(change): disable esp32c61 tests

See merge request espressif/esp-idf!39656
 2025-06-17 14:08:56 +08:00
Aditya Patwardhan
2e7a9174fc Merge branch 'feature/esp_tee_h2_v5.5' into 'release/v5.5' 
feat(esp_tee): Support for ESP32-H2 (v5.5)

See merge request espressif/esp-idf!39311
 2025-06-16 12:04:22 +05:30
morris
d8fa0886b0 Merge branch 'feat/c5_eco2_psram_timing_tuning_v5.5' into 'release/v5.5' 
mspi: psram 80M timing tuning on C5 ECO2 (v5.5)

See merge request espressif/esp-idf!39345
 2025-06-16 10:01:13 +08:00
Li Shuai
693a5393b2 change(unit-test): filter top domain power down check for some sleep test cases 2025-06-05 22:08:34 +08:00
Erhan Kurubas
0170c56e04 ci(change): disable esp32c61 tests 2025-06-04 11:11:05 +02:00
harshal.patil
59496b4927 fix(system_internal): Avoid the sec clock reset caused due to resetting all crypto peripherals 2025-05-26 11:40:51 +05:30
armando
e7c8f555e7 refactor(mspi): change mspi timing tuning dirrectory structure 2025-05-22 14:42:37 +08:00
Laukik Hase
27496e47f0 feat(esp_tee): Support for ESP32-H2 - the rest of the components 2025-05-21 10:06:17 +05:30
chaijie@espressif.com
5e6ecd81b5 refactor: move_ocode_to_pmu_init_c6_c5_c61 (v5.5) 2025-05-20 21:14:56 +08:00
Harshal Patil
51fef26287 Merge branch 'fix/configure_xip_psram_alignment_gaps_heap_by_default' into 'master' 
Add XIP PSRAM alignment gaps in heap only if PSRAM protection is enabled

See merge request espressif/esp-idf!38888
 2025-05-12 15:07:07 +08:00
wuzhenghui
9b5944b795 feat(esp_hw_support): support switch to VBAT power supply in deepsleep on esp32p4 2025-05-08 16:44:58 +08:00
harshal.patil
3123fff18a fix(esp_psram): Add XIP PSRAM alignment gaps in heap only if PSRAM protection is enabled 2025-05-05 10:50:19 +05:30
Shen Meng Jing
62d4115e08 docs: Fix some typos 2025-04-30 18:35:39 +08:00
Harshal Patil
d898c2398b Merge branch 'feat/some_xip_psram_related_optimisations_and_fixes' into 'master' 
feat(esp_psram): Fix late PSRAM init and add some wasted XIP PSRAM memory in heap

Closes IDF-11463 and IDF-10555

See merge request espressif/esp-idf!37116
 2025-04-30 00:02:19 +08:00
Marius Vikhammer
4ea1facb42 Merge branch 'feature/esp32h21_core_support' into 'master' 
feat(esp32h21): added support for misc core system features

Closes IDF-12042, IDF-11598, IDF-11596, IDF-11874, IDF-11873, IDF-11528, and IDF-11511

See merge request espressif/esp-idf!38773
 2025-04-29 14:53:52 +08:00
harshal.patil
ab229a34b3 feat(cpu_region_protect): Enable basic memory protection for SPIRAM 2025-04-29 11:48:27 +05:30
harshal.patil
46225a4026 feat(esp_psram): Add a new API to just detect and enable the PSRAM 
- esp_psram_chip_init() just detects and does basic initialisations of PSRAM
- esp_psram_init() initialises and maps/loads the PSRAM pages
 2025-04-29 11:48:27 +05:30
Marius Vikhammer
112a955111 Merge branch 'feature/h21_reset_reason' into 'master' 
feat(system): updated reset reasons for H21

Closes IDF-11542

See merge request espressif/esp-idf!38774
 2025-04-28 17:35:30 +08:00
Marius Vikhammer
1256078ea2 feat(esp32h21): added support for misc core system features 2025-04-28 11:42:25 +08:00
Marius Vikhammer
298da837fd feat(system): updated reset reasons for H21 2025-04-27 16:11:24 +08:00
Konstantin Kondrashov
33cab69f30 Merge branch 'feature/binary_logging' into 'master' 
feat(log): Add binary logging support

Closes IDF-6634

See merge request espressif/esp-idf!36595
 2025-04-23 19:55:45 +08:00
Sudeep Mohanty
b9d055dfda Merge branch 'fix/multi_core_race_cond_in_panic_handler' into 'master' 
fix(panic_handler): Prevent race condition in panic handler

Closes IDFCI-2802, IDFCI-2867, and IDFCI-2869

See merge request espressif/esp-idf!37958
 2025-04-23 18:52:16 +08:00
Konstantin Kondrashov
204046e799 feat(log): Add binary logging support 2025-04-23 15:46:34 +08:00
Li Shuai
77a1e2931d change: fix build clang test apps job error 2025-04-17 22:01:10 +08:00
Mahavir Jain
e37c47f6e7 Merge branch 'bugfix/crypto_reset_on_exit' into 'master' 
fix(esp_system): reset crypto peripherals before device restart

See merge request espressif/esp-idf!38399
 2025-04-17 21:24:25 +08:00
Sudeep Mohanty
edf4234da9 fix(panic_handler): Prevent race condition in panic handler 
This commit updates all RTC WDT contexts to be local instead of global
to avoid race conditions when both cores enter the panic handler
simultaneously.
 2025-04-17 13:56:25 +02:00
Laukik Hase
4a4d63d36e feat(esp_tee): Protect the ECC peripheral from REE access 2025-04-16 19:19:04 +05:30
Laukik Hase
fc4802c0d6 feat(esp_tee): Protect the HMAC and DS peripherals from REE access 2025-04-16 19:19:04 +05:30
laokaiyao
0abc755342 feat(rom): update rom for c5 eco2 
Breaking: Starting from this commit, ESP-IDF can only support ESP32-C5 v1.0 (ECO2)
 2025-04-16 11:01:36 +08:00
Mahavir Jain
55a2ad3df3 fix(esp_system): reset crypto peripherals before device restart 
This change addresses a rare but critical issue observed on certain
ESP32-C3 and ESP32-S3 devices, where secure boot verification
intermittently fails due to improper cleanup of crypto peripherals
during a restart.

Background – Restart Behavior in IDF
------------------------------------
In ESP-IDF, when the device restarts (via `esp_restart()` or due to a
panic/exception), a partial peripheral reset is performed followed by a
CPU reset. However, until now, crypto-related peripherals were not
included in this selective reset sequence.

Problem Scenario
----------------
If a restart occurs while the application is in the middle of a bignum
operation (i.e., using the MPI/Bignum peripheral), the ROM code may
encounter an inconsistent peripheral state during the subsequent boot.
This leads to transient RSA-PSS secure boot verification failures.

Following such a failure, the ROM typically triggers a full-chip reset
via the watchdog timer (WDT). This full reset clears the crypto
peripheral state, allowing secure boot verification to succeed on the
next boot.

Risk with Aggressive Revocation
-------------------------------
If secure boot aggressive revocation is enabled (disabled by default in
IDF), this transient verification failure could mistakenly lead to
revocation of the secure boot digest.

If your product configuration has aggressive revocation enabled,
applying this fix is strongly recommended.

Frequency of Occurrence
-----------------------
The issue is rare and only occurs in corner cases involving
simultaneous use of the MPI peripheral and an immediate CPU reset.

Fix
---
This fix ensures that all crypto peripherals are explicitly reset prior
to any software-triggered restart (including panic scenarios),
guaranteeing a clean peripheral state for the next boot and preventing
incorrect secure boot behavior.
 2025-04-15 19:06:26 +05:30
armando
1abe57c987 test(system): increased 200B memory leak thresh due to mmu mmap mutex 
200B to extend the thresh, real increase to the memory usage will be smaller
 2025-04-14 10:45:40 +08:00
wuzhenghui
b3911c7c89 fix(esp_hw_support): fix unused OSC source deinit breaks XTAL32K configuration 2025-04-10 20:56:53 +08:00
Wu Zheng Hui
38fcc41ff2 Merge branch 'feat/enable_esp32p4_auto_clock_gate' into 'master' 
feat(esp_hw_support): enable auto clock gating for multi peripherals

See merge request espressif/esp-idf!37986
 2025-04-09 21:42:04 +08:00
wuzhenghui
6ca0614e89 feat(esp_hw_support): enable auto clock gating for multi peripherals 2025-04-09 17:07:49 +08:00
wuzhenghui
c84757d35e fix(esp_hw_support): fix current leakage if ext32k slow clock source not exists 2025-04-08 20:07:47 +08:00
Jiang Jiang Jian
7daa7c8e0e Merge branch 'feat/esp32h21_system_sleep_cpu' into 'master' 
Stage 4: Support esp32h21 CPU domain power down and retention

Closes PM-351

See merge request espressif/esp-idf!37510
 2025-04-08 13:55:29 +08:00
Chen Jichang
2cbc297969 refactor(gptimer): use group_id in clock ctrl functions 2025-04-08 10:20:48 +08:00
Chen Jichang
faacaaaf8f feat(gptimer): support gptimer on esp32h4 2025-04-08 09:55:42 +08:00
wanckl
51873d46aa feat(driver_spi): add h21 spi drivers supports 2025-04-03 11:27:29 +08:00
Chen Jichang
c34b4eb882 feat(esp32h4): enable ESP32H4 ci build 2025-03-28 14:41:28 +08:00