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d9e1d51ec885c0ddcebcbb01b9c09d09e12fab2c
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2 Commits

Author SHA1 Message Date
Angus Gratton
420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
 2020-11-13 07:49:11 +11:00
Andrei Gramakov
84aa1c0cc3 usb: cdc support, streams redirection; ci, examples upd 
tusb: cdc, tasks encapsulation, callbacks api, multiple interfaces
examples: added serial interface and usb console
ci: reimplemented cmake/make test in python with ignore lists

IDF-578
 2020-08-06 15:26:08 +02:00