Commit Graph

136 Commits

Author SHA1 Message Date
Armando
339c24ca47 refactor(mspi): added mspi_timing_tuning dir 2024-12-04 09:45:03 +08:00
Armando (Dou Yiwen)
4cb18200d5 Merge branch 'feat/120m_flash_p4' into 'master'
flash: 120MHz timing tuning support on ESP32P4 (no merge now)

Closes IDF-11678

See merge request espressif/esp-idf!34995
2024-11-29 11:40:29 +08:00
morris
59174716e5 Merge branch 'refactor/fine_tune_dphy_pll' into 'master'
feat(mipi): fine tune DPHY PLL clock

See merge request espressif/esp-idf!35162
2024-11-28 22:09:47 +08:00
Armando
1eef2e8c19 feat(mspi): supported flash 120MHz SDR timing tuning on ESP32P4 2024-11-28 14:53:19 +08:00
morris
2bf02443f1 feat(mipi): fine tune DPHY PLL clock 2024-11-28 11:20:45 +08:00
Song Ruo Jing
aa35807198 fix(clk): add an inevitable kconfig option to be selected to use rc32k 2024-11-26 21:20:32 +08:00
Armando
9e3b7e4558 feat(sdmmc): supported UHS-I SDR50 (100Mhz) and DDR50 mode 2024-11-13 09:47:45 +08:00
Song Ruo Jing
7e90a41bc9 Merge branch 'refactor/regi2c_mst_clock_enable' into 'master'
refactor(regi2c): analog i2c mst clock should be enabled/disabled per usage

Closes IDF-10492 and IDF-10693

See merge request espressif/esp-idf!32682
2024-11-05 15:15:26 +08:00
Song Ruo Jing
2cb35a2955 refactor(regi2c): ana i2c master clock is enabled per request 2024-11-04 12:37:17 +08:00
wuzhenghui
feafc84ece fix(esp_hw_support): fix writeback cache to psram after vo2 powerdown 2024-11-01 14:11:40 +08:00
Wu Zheng Hui
cceadc4ce8 Merge branch 'fix/fix_ota_slowclock_switching' into 'master'
fix(esp_hw_support): fix rtc slow clock missing after the OTA app changes the slow clock source

Closes IDF-11424

See merge request espressif/esp-idf!34416
2024-10-29 21:49:03 +08:00
wuzhenghui
3881d4031d fix(esp_hw_support): enable all supported slow clock at pmu_init 2024-10-24 14:22:51 +08:00
wuzhenghui
a1f9d5bcea feat(esp_hw_support): support power down PSRAM or Flash during sleep for esp32p4 v1.0 2024-10-23 19:10:42 +08:00
zlq
da9521aef3 fix(pmu): modify parameter for P4 ECO2-VO1 2024-10-23 16:03:21 +08:00
Song Ruo Jing
ed91ad56da Merge branch 'refactor/pll_pd_in_sleep_logic' into 'master'
fix(clk): rtc_clk_cpu_freq_set_xtal will always disable CPU's PLL

See merge request espressif/esp-idf!34241
2024-10-18 14:12:15 +08:00
Song Ruo Jing
7c0b1dc98c fix(clk): rtc_clk_cpu_freq_set_xtal will always disable CPU's PLL
Align C6/H2/C5/C61 rtc_clk_cpu_freq_set_xtal behavior to other chips
For PMU supported chips, powering down CPU PLL in sleep will be done by PMU, not sleep code
2024-10-17 12:41:15 +08:00
Song Ruo Jing
67a87a5fcd fix(pmu): enable all func clock icg during retention
This should only increase a tiny amount of the power consumption in the retention process,
but save debug time since some module register read/write relies not only APB but also func clock.
2024-10-17 12:41:15 +08:00
Armando
6db48cff25 feat(sleep): support vad wakeup hp core 2024-10-16 17:27:27 +08:00
C.S.M
99f1eace07 feat(bod): Update bod threshold on esp32p4-eco2 2024-10-12 18:03:24 +08:00
Jiang Jiang Jian
12cbdfef31 Merge branch 'feature/set_lp_cpu_power_mode_with_clock_src' into 'master'
change(esp_hw_support): switch lp_cpu power mode with clock src selection to save lp_cpu working power

Closes AEG-1430

See merge request espressif/esp-idf!30556
2024-09-29 18:32:32 +08:00
wuzhenghui
6520c61cff change(esp_hw_support): improve gpio deepsleep wakeup configuration code 2024-09-29 16:56:42 +08:00
wuzhenghui
9ffd8aa017 fix(esp_hw_support): fix coverity defects in sleep code 2024-09-29 16:56:42 +08:00
wuzhenghui
e1a341455a fix(esp_hw_support): fix esp32p4 CPU frequency switching timing 2024-09-26 14:57:03 +08:00
wuzhenghui
04b2afed44 change(esp_hw_support): switch lp_cpu power mode with clock src to save lp_cpu working power 2024-09-26 11:23:06 +08:00
wuzhenghui
ef4c02dda2 revert(esp_hw_support): stall another core during cpu/mem/apb freq switching
This reverts commit c2bb64fbe8.
2024-09-25 20:19:15 +08:00
Mahavir Jain
2a6be654cd Merge branch 'ci/enable_memprot_tests_for_esp32c61' into 'master'
Clear PMA entries before usage and enable tests for ESP32-C61

Closes IDF-10932

See merge request espressif/esp-idf!33438
2024-09-20 21:32:18 +08:00
Marius Vikhammer
564d777018 Merge branch 'feature/lp_core_40_mhz' into 'master'
feat(system): support choosing xtal as rtc-fast clock src on P4 and C5

Closes IDF-10203

See merge request espressif/esp-idf!32450
2024-09-20 10:57:15 +08:00
Marius Vikhammer
00eb97725b feat(system): support choosing xtal as rtc-fast clock src on P4 and C5
With xtal as rtc-fast clock source the LP-Core can run at twice the default
clock frequency. 40 MHz as opposed to 20 MHz.
2024-09-19 17:30:44 +08:00
harshal.patil
7667d9ebbe fix(cpu_region_protect): Reset PMA entries before using them
- ROM uses some PMA entries so we clear such PMA entries before using them in ESP-IDF
2024-09-18 10:25:18 +05:30
Marius Vikhammer
5486653a18 Merge branch 'contrib/github_pr_14422' into 'master'
feat(esp_system,ulp): LP core reserved mem optionally executable from HP core (GitHub PR)

Closes IDFGH-13533

See merge request espressif/esp-idf!33139
2024-09-12 09:10:22 +08:00
wuzhenghui
13e42707a0 feat(esp_hw_support): add clk tree source gate management api 2024-09-11 10:53:01 +08:00
wuzhenghui
05e74480f5 feat(esp_system): gate some clock by default to optmize esp32p4 active power 2024-09-11 10:53:00 +08:00
andylinpersonal
0e30c42625 feat(esp_system,ulp): Make LP core reserved memory optionally executable in HP core 2024-09-10 12:17:38 +08:00
chaijie@espressif.com
c9d4913393 fix(sleep): fix_wrong_sleep_param_for_lp_memory_retention 2024-09-04 15:02:15 +08:00
Kevin (Lao Kaiyao)
b71768b742 Merge branch 'feature/support_apll_on_p4' into 'master'
feat(clock): support apll clock on p4

Closes IDF-8884

See merge request espressif/esp-idf!33101
2024-08-30 14:45:57 +08:00
Li Shuai
1fa27cbb0d Merge branch 'feature/esp32c5mp_light_sleep_support_stage_2' into 'master'
feat(esp_hw_support): esp32c5mp sleep support (system part)

Closes IDF-8643, PM-195, PM-169, IDF-8641, IDF-8640, IDF-8639, IDF-8638, CV-259, IDF-10308, IDF-10317, IDF-10310, PM-202, IDF-10918, PM-207, PM-208, PM-210, and PM-214

See merge request espressif/esp-idf!31645
2024-08-29 19:32:05 +08:00
laokaiyao
3937e225ec feat(clock): support apll clock on p4 2024-08-29 18:44:05 +08:00
harshal.patil
95f286555a fix(esp_hw_support): Use _iram_text_end instead of _iram_end for I/D-RAM split 2024-08-28 11:16:27 +05:30
Lou Tianhao
d6737c3207 refactor(esp_hw_support): refactor sleep clock, split it to support multiple targets 2024-08-28 10:44:08 +08:00
Lou Tianhao
5e5fb89c10 change(esp_hw_support): modify the root clock source of pmu modem state to pll for esp32c5 2024-08-28 10:44:08 +08:00
Lou Tianhao
a0da9ade35 feat(esp_hw_support): support top domain powered down during sleep for esp32c5 2024-08-28 10:44:08 +08:00
laokaiyao
1c2f8b8ce0 feat(bootloader): support to check efuse block revision
change(bootloader): remove ignore efuse check flag (temp)

change(bootloader): use int for the minimum efuse blk rev (temp)
2024-08-26 10:02:31 +08:00
Wu Zheng Hui
789b9ad5a9 Merge branch 'feat/support_xtal_as_rtc_fast_sleep' into 'master'
feat(esp_hw_support): support PMU parameters when XTAL is used as fast clock source

Closes PM-197

See merge request espressif/esp-idf!32811
2024-08-22 19:37:13 +08:00
wuzhenghui
2659607d13 feat(esp_hw_support): support PMU parameters when XTAL is used as fast clock source 2024-08-21 15:44:01 +08:00
harshal.patil
488b2a741d change(esp_security): Move the crypto locking layer into the security component 2024-08-20 12:35:22 +08:00
wuzhenghui
fb84c24bae fix(esp_hw_support): always writeback L1D$ before sleep to keep cpu/regdma data consistency 2024-08-15 12:18:16 +08:00
morris
631e15c6eb feat(ldo): add config to let hardware control the ldo output
If LDO1 is used by spi flash, then we recommend to give the ownership to
the hardware. Software just read the parameters from the efuse and set
to PMU.
2024-08-13 14:50:38 +08:00
wuzhenghui
d7eb829fd0 feat(esp_hw_support): support esp32p4 psram retention 2024-08-05 13:21:05 +08:00
wuzhenghui
29b51468e1 fix(esp_hw_support): fix bad power parameter if PSRAM is enabled during sleep 2024-08-01 14:33:31 +08:00
Jiang Jiang Jian
08b897912b Merge branch 'fix/stall_other_core_in_cpu_freq_switching' into 'master'
fix(esp_hw_support): stall another core during cpu/mem/apb freq switching

See merge request espressif/esp-idf!32063
2024-07-17 10:26:12 +08:00