Aditya Patwardhan
cddc6685f1
Merge branch 'feature/enable_support_for_deterministic_mode_and_ecdsa_192_v5.3' into 'release/v5.3'
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Feature/enable support for deterministic mode and ecdsa 192 v5.3
See merge request espressif/esp-idf!40102
2025-06-25 14:37:58 +05:30
nilesh.kale
2a6e018ee8
feat: enable support for deterministic mode for esp32h2
2025-06-25 10:51:01 +05:30
hrushikesh.bhosale
636eb4b62f
feat(mbedtls): Add configuration to control dynamic buffer strategy in mbedtls
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Problem:
1. In low-memory scenarios, the dynamic buffer feature can fail due to memory fragmentation.
2. It requires a contiguous 16KB heap chunk, but continuous allocation and deallocation of
the RX buffer can lead to fragmentation.
3. If another component allocates memory between these operations, it can break up the
available 16KB block, causing allocation failure.
Solution:
1. Introduce configurable strategy for using dynamic buffers in TLS connections.
2. For example, convert RX buffers to static after the TLS handshake.
3. Allow users to select the strategy via a new field in the esp_http_client_cfg_t structure.
4. The strategy can be controlled independently for each TLS session.
2025-06-24 17:44:04 +05:30
nilesh.kale
19fcf0e073
feat: enabled ECDSA-P192 support for ESP32H2
2025-06-24 15:03:59 +05:30
harshal.patil
5bd3fb9f0c
fix(mbedtls): Fix config dependencies when ROM mbedtls is used
2025-04-29 11:20:25 +05:30
harshal.patil
36e5d6c695
feat(mbedtls): Make mbedtls SHA1 support configurable
2025-04-29 11:17:27 +05:30
Ashish Sharma
ededcccda5
feat(mbedtls): new config to allow weak cert verification
2025-04-15 13:10:26 +08:00
Aditya Patwardhan
68eb689b35
fix(hal): Make the ECDSA countermeasure dynamically applicable
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This commit makes the ECDSA countermeasure dynamically applicable
across different revisions of the ESP32H2 SoC.
2025-02-26 17:04:19 +05:30
Mahavir Jain
e97c51ea24
feat(ecc): enable ECC constant time mode for ESP32-H2 ECO5
2025-02-19 19:15:17 +05:30
harshal.patil
8d30077744
feat(hal/aes): Enable pseudo rounds function during AES operations
2025-01-23 14:06:16 +05:30
harshal.patil
ea5c318031
fix(mbedtls/aes): Fix external memory corruption caused due to unaligned length cache sync
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Fixes the memory corruption issue that arises due to external memory cache sync of unaligned
length bytes when L2 cache line size is greater than the L1 cache line size
2024-11-21 12:16:18 +05:30
Mahavir Jain
921a8a7e71
Merge branch 'feat/mbedtls_size_optimization_v5.3' into 'release/v5.3'
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Fix the increase in build size of mbedtls while upgrading to v3.x (v5.3)
See merge request espressif/esp-idf!34252
2024-10-28 11:16:23 +08:00
Aditya Patwardhan
20ab1e807d
fix(mbedtls): Fix the MBEDTLS_FS_IO dependency on vfs
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By default MBEDTLS_FS_IO option in mbedtls uses the filesystem supported
added by vfs component.
If the vfs support is disabled by user then mbedtls raises a warning
that the filesystem realted operation shall always fail
This commit fixes the behaviour by enabling respective depedency check for the
MBEDTLS_FS_IO option
Closes https://github.com/espressif/esp-idf/issues/14409
2024-10-18 09:15:23 +05:30
harshal.patil
18998ddbe0
fix(mbedtls): Fix the increase in build size of mbedtls when upgrading to v3.x
2024-10-17 14:53:30 +05:30
harshal.patil
8d9d5ee218
feat(mbedtls/esp_crt_bundle): Move dummy cert to .rodata to save 408B from dram
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Co-authored-by: Hanno <h.binder@web.de >
2024-10-16 16:36:33 +05:30
Aditya Patwardhan
44ce512011
feat(hal): Add countermeasure for ECDSA generate signature
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The ECDSA peripheral before ECO5 of esp32h2 does not perform the ECDSA
sign operation in constant time. This allows an attacker to read the
power signature of the ECDSA sign operation and then calculate the
ECDSA key stored inside the eFuse. The commit adds a countermeasure
for this attack. In this case the real ECDSA sign operation is
masked under dummy ECDSA sign operations to hide its real power
signature
2024-09-30 12:24:38 +08:00
harshal.patil
e1d72e960c
feat(mbedtls): Wrap mbedtls_ecdsa_read_signature to use ECDSA hardware when possible
2024-09-24 17:05:27 +05:30
harshal.patil
87ddff0ce5
fix(mbedtls/port): Check signature hash length before using ECDSA hardware
2024-09-24 16:48:01 +05:30
Richard Allen
0d3856e369
change(mbedtls/port): optimize gcm_mult()
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1) pre-shift GCM last4 to use 32-bit shift
On 32-bit architectures like Aarch32, RV32, Xtensa,
shifting a 64-bit variable by 32-bits is free,
since it changes the register representing half of the 64-bit var.
Pre-shift the last4 array to take advantage of this.
2) unroll first GCM iteration
The first loop of gcm_mult() is different from
the others. By unrolling it separately from the
others, the other iterations may take advantage
of the zero-overhead loop construct, in addition
to saving a conditional branch in the loop.
2024-09-17 20:06:24 +08:00
Jiang Guang Ming
5a3c22dc2b
feat(mbedtls): support rom mbedtls threading layer
2024-09-10 10:00:44 +08:00
Jiang Guang Ming
fb9a435952
feat(mbedtls): support ROM mbedtls v3.6.0 on C2 rev2.0(ECO4)
2024-09-10 09:47:39 +08:00
Richard Allen
b4c956c801
fix(mbedtls/port): fix codespell issues
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Fix a few comments codespell identified.
2024-09-09 14:09:19 +08:00
harshal.patil
e94d1f275c
fix(mbedtls/aes): Avoid extra C2M sync of memory
2024-08-08 14:50:38 +05:30
Mahavir Jain
2c84e2e40b
Merge branch 'fix/fix_aes_dma_desc_align_v5.3' into 'release/v5.3'
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fix(aes): fixed aes wrong dma desc alignment (v5.3)
See merge request espressif/esp-idf!32206
2024-07-26 11:46:23 +08:00
Mahavir Jain
99467a17e9
Merge branch 'bugfix/c5_mpi_ecc_power_mode_v5.3' into 'release/v5.3'
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fix(hal): correct mpi/ecc peripheral power up sequence for ESP32-C5 (v5.3)
See merge request espressif/esp-idf!31728
2024-07-25 16:49:05 +08:00
Mahavir Jain
99b1e56500
fix(hal): correct the power up sequence for MPI/ECC peripherals in ESP32-C5
2024-07-19 13:39:03 +08:00
Armando
c3fc7cffda
fix(aes): fixed aes wrong dma desc alignment
2024-07-18 16:26:09 +08:00
morris
3e3e1c77ba
change(aes): refactor DMA buffer allocation
2024-06-25 13:49:24 +08:00
morris
2f0c9b3584
feat(gdma): set burst size and return alignment constraint
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burst size can affect the buffer alignment
2024-06-07 22:44:18 +08:00
harshal.patil
bef1fba3bc
fix(mbedtls/crypto_shared_gdma): Enable AXI-DMA enable external memory AES-ECC access
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- When external memory encryption is enabled, set the aes_ecc bit of AXI-DMA to enable memory access
2024-05-20 14:40:49 +08:00
nilesh.kale
fe628d5951
feat(mbedtls): updated mbedtls version from 3.5.2 to 3.6.0
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This MR updated MbedTLS version to latest version 3.6.0.
2024-05-07 14:16:21 +05:30
Armando
d341540a5e
change(drivers): other driver changes for cache malloc
2024-04-15 15:34:51 +08:00
Mahavir Jain
64fd14e787
feat(mbedtls): add kconfig option for MBEDTLS_ERROR_C
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Disabling this config can reduce footprint for the cases where
mbedtls_strerror() is used and hence the debug strings are getting
pulled into the application image.
2024-04-04 09:20:28 +05:30
harshal.patil
e383616503
fix(mbedtls/aes): Fix incorrect dma alignment size
2024-04-02 14:30:14 +08:00
gaoxu
40f38bea6f
feat(dma): refactor dma calloc function
2024-04-02 14:30:14 +08:00
Aditya Patwardhan
d0a23799e8
feat(mbedtls): Added support for using ECDSA key through key manager
2024-04-01 14:37:12 +05:30
harshal.patil
272633bde1
fix(mbedtls/ecdsa): Fix dependant peripheral's enable and reset
2024-03-29 12:40:13 +05:30
harshal.patil
84b6940ce4
feat(mbedtls/ecdsa): Wrapped ecdsa_write_signature to support deterministic ECDSA signatures
2024-03-29 12:14:11 +05:30
harshal.patil
70ef80d974
feat(mbedtls/ecdsa): Add support for deterministic ECDSA signature generation
2024-03-29 12:14:11 +05:30
harshal.patil
95fac15698
feat(hal/ecdsa): Add HAL API for operation successful check
2024-03-29 12:14:11 +05:30
harshal.patil
9cd10e196b
feat(hal/sha): use RCC atomic block to enable/reset the SHA peripheral
2024-03-27 11:23:30 +05:30
harshal.patil
211a2a5477
feat(mbedtls/sha): Support SHA-DMA operations by satisfying L1 cache alignment requirements
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- Use block mode as default SHA operation mode instead of DMA
2024-03-27 11:23:29 +05:30
harshal.patil
d737625215
feat(mbedtls/sha): Support in AXI-DMA SHA driver layer
2024-03-27 11:23:29 +05:30
harshal.patil
853bff88c5
change(mbedtls/sha): replace Cache ROM APIs usage with APIs from esp_cache.h
2024-03-27 11:23:29 +05:30
harshal.patil
c4f052cee4
feat(mbedtls/aes): Satisfy L1 cache alignment for AES-GCM DMA operations
2024-03-26 11:38:33 +05:30
harshal.patil
07f7b06d8d
change(mbedtls/aes): Move aad desc population into the internal AES-GCM DMA process API
2024-03-26 11:31:11 +05:30
harshal.patil
0b16999093
fix(mbedtls/aes): Remove ESP_CACHE_MSYNC_FLAG_UNALIGNED flag for the cache M2C operation
2024-03-22 14:45:34 +05:30
Mahavir Jain
cd47cf46dc
Merge branch 'esp32p4/add_aes_support' into 'master'
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feat: add AES support for ESP32-P4
Closes IDF-6519
See merge request espressif/esp-idf!26429
2024-03-15 11:43:22 +08:00
Wu Zheng Hui
5a682c3bbb
Merge branch 'feature/optimize_chips_active_power' into 'master'
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feat(system): Optimize the power consumption of esp32h2 and esp32c6 in the active state
Closes IDF-5658
See merge request espressif/esp-idf!27798
2024-03-14 12:08:33 +08:00
harshal.patil
e8268d8b6b
feat(hal/aes): use RCC atomic block to enable/reset the AES peripheral
2024-03-13 15:22:07 +05:30