Commit Graph

23 Commits

Author SHA1 Message Date
harshal.patil
a02dec09ca refactor(bootloader_support): Unify bootloader_sha layer 2025-03-21 16:37:20 +05:30
Chen Jichang
9fd0f634d2 fix(bootloader): use ESP_EARLY_LOG before console is ready 2025-03-17 18:53:28 +08:00
Armando
14b5db0e87 refactor(mspi): rename to mspi_ll.h 2025-01-07 16:16:06 +08:00
Song Ruo Jing
2cb35a2955 refactor(regi2c): ana i2c master clock is enabled per request 2024-11-04 12:37:17 +08:00
Mahavir Jain
336f938110 fix(bootloader): self encryption workflow in bootloader not working on C5
Added explicit wait for key manager state to be idle before configuring
the register for flash encryption key usage from efuse. This now ensures
that flash contents are encrypted using efuse programmed key.

Also refactored code a bit to move into target specific directory.
2024-09-25 14:21:16 +05:30
wuzhenghui
05e74480f5 feat(esp_system): gate some clock by default to optmize esp32p4 active power 2024-09-11 10:53:00 +08:00
Armando
42cf1d8867 fix(mspi): fixed mspi clock wrong on ram loadable app on c5 2024-09-10 11:12:02 +08:00
Armando
6933ba39bc fix(system): fixed ram loadable app on p4 2024-09-09 10:31:48 +08:00
morris
9716d9e5ca refactor(brownout): correct names comments in the LL driver 2024-08-07 10:46:57 +08:00
Song Ruo Jing
3aa27ae960 refactor(regi2c): add LL function to control analog i2c master clock 2024-07-24 12:26:59 +08:00
C.S.M
7909291922 fix(bod): Disable fib in bootloader so that interrupt can be triggered properly 2024-06-06 15:22:53 +08:00
C.S.M
374c89097f feat(spi_flash): Adjust flash clock to real 80M clock, and support 32bit address on eco1 2024-05-27 19:42:47 +08:00
Xiao Xufeng
8753934582 feat(esp32p4): add eco1 revision config option 2024-05-10 22:51:12 +08:00
chaijie@espressif.com
29ddd2b720 feat(esp32p4_eco1): modify cpll and spll config 2024-05-10 22:18:17 +08:00
Armando
62440e5b12 change(psram): update voltage configurations 2024-02-29 10:42:37 +08:00
Marius Vikhammer
4ce4af61ad fix(system): update reset reasons for P4 and C5 2024-02-21 11:59:28 +08:00
KonstantinKondrashov
b471d9d22c change(all): Clearing unused efuse rom headers 2024-01-22 18:02:55 +02:00
Song Ruo Jing
7f2b85b82b feat(clk): add basic clock support for esp32p4
- Support CPU frequency 360MHz
- Support SOC ROOT clock source switch
- Support LP SLOW clock source switch
- Support clock calibration
2023-12-29 00:37:26 +08:00
fl0wl0w
d149c1b26f Use configuration option instead of in components not related to FreeRTOS
Mergeshttps://github.com/espressif/esp-idf/pull/12481
2023-11-28 07:49:20 +00:00
Xiao Xufeng
28f19cf0e6 fix(ram_app): Fixed issue ram_app can't use the SPI Flash
1st bootloader won't help to initialize the MSPI & cache properly as it
usually do when loading from flash. And the ram app doesn't have valid
headers.

Since there is no enough space in 2nd bootloader, we replace the
`bootloader_init_spi_flash` in the ram_app (!pure_ram_app), with an
customized alternative of it for the ram_app.

This alternative helps to initialize the MSPI & cache properly, without
the help of 1st bootloader or image headers.
2023-11-01 02:01:45 +08:00
Marius Vikhammer
e58becec0a feat(esp-system): support reset reasons on P4 2023-09-15 08:11:34 +08:00
Marius Vikhammer
e3861261eb fix(wdt): move non-auto generated wdt values to ll 2023-09-05 11:52:34 +08:00
Armando
706d684418 feat(esp32p4): introduced new target esp32p4, supported hello_world 2023-08-09 19:33:25 +08:00