Commit Graph

12 Commits

Author SHA1 Message Date
Aditya Patwardhan
662d793f37 feat(esp_security): Added support for key manager for esp32c5 2025-06-27 15:15:26 +05:30
morris
2fb938c7c3 Merge branch 'feature/utilize_rom_gpio_function' into 'master'
feat(gpio): esp_rom_gpio_connect_in/out_signal now has their hal implementation

Closes IDFGH-15397

See merge request espressif/esp-idf!39383
2025-06-16 12:17:40 +08:00
Konstantin Kondrashov
3a7c1a2e74 feat(bootloader): Bootloader OTA update with recovery bootloader feat 2025-06-12 18:47:33 +08:00
Song Ruo Jing
3e2945b595 fix(gpio): remove GPIO_OUTPUT_SET macro for ESP32P4
Use GPIO_OUTPUT_SET led to compilation error

Closes https://github.com/espressif/esp-idf/issues/16050
2025-06-11 20:56:12 +08:00
harshal.patil
afdf1a31c8 feat(soc): Update ESP32-C5 ECO2 to support SHA512 2025-06-06 14:51:44 +05:30
Song Ruo Jing
1b3680eff3 feat(rtc_time): support rtc time for esp32c61 2025-04-23 14:15:01 +08:00
nilesh.kale
49e1e22f72 fix(esp_rom): Remove AES-192 references for unsupported chips
Cleaned up references to AES-192 in ROM headers for chips that do not support it.
2025-03-06 17:48:17 +05:30
wanckl
a50c095df1 fix(esp_driver_gpio): esp32c61 gpio number update 22 -> 25 2024-11-08 10:36:20 +08:00
Aditya Patwardhan
e5d246ef27 feat(hal): esp32c5: Add hal layer for key manager 2024-10-28 11:13:43 +08:00
Song Ruo Jing
335d39b869 feat(clk): Add basic clock support for esp32c61
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration
- Remove FPGA build
2024-07-31 22:41:22 +08:00
gaoxu
5da216a753 fix(gpio): fix gpio const zero addr 2024-07-11 09:46:58 +08:00
Xiaoyu Liu
2cb9419b14 change(esp_rom): optimize target-specific header files layout in components/esp_rom 2024-06-27 11:24:45 +08:00