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47,042 Commits 22 Branches 172 Tags
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Commit Graph

58 Commits

Author SHA1 Message Date
morris
71cb24caab feat(timg): graduate the hal driver into a single component 2025-09-27 17:33:10 +08:00
Konstantin Kondrashov
dcf486359e feat(log): Optimize log tag init for bin logging 2025-09-15 15:59:52 +03:00
Song Ruo Jing
48233e0e7e refactor(ledc): remove deprecated LEDC_USE_RTC8M_CLK macro for v6.0 2025-07-30 20:01:47 +08:00
Song Ruo Jing
f61e780f60 refactor(clk): deprecate rtc_cal_sel_t enum 2025-07-30 20:01:46 +08:00
morris
c4d7b1cfce refactor(uart)!: deprcated esp_rom_uart.h 2025-07-08 18:56:17 +08:00
Konstantin Kondrashov
ff0408c087 feat(esp_system): Adds Kconfigs to place code in IRAM 2025-06-23 13:23:33 +03:00
Laukik Hase
12e2df2d74 feat(esp_tee): Support for ESP32-H2 - the rest of the components 2025-05-20 16:31:23 +05:30
wuzhenghui
b3911c7c89 fix(esp_hw_support): fix unused OSC source deinit breaks XTAL32K configuration 2025-04-10 20:56:53 +08:00
wuzhenghui
c84757d35e fix(esp_hw_support): fix current leakage if ext32k slow clock source not exists 2025-04-08 20:07:47 +08:00
Chen Jichang
2cbc297969 refactor(gptimer): use group_id in clock ctrl functions 2025-04-08 10:20:48 +08:00
Song Ruo Jing
aa35807198 fix(clk): add an inevitable kconfig option to be selected to use rc32k 2024-11-26 21:20:32 +08:00
wuzhenghui
c067e406ce fix(esp_system): deselect all modem modules clk source selection before clk init 2024-11-15 11:00:16 +08:00
wuzhenghui
7fdfa6c227 fix(esp_hw_support): disable unused clock sources after rtc clock switching complete 2024-10-28 15:57:26 +08:00
Song Ruo Jing
6afbc06666 feat(gdma): add retention support for esp32p4, esp32c5, esp32c61 2024-09-24 12:33:41 +08:00
harshal.patil
b729a0a732 change(esp_security): Move crypto clk configuration into the security component 2024-08-20 12:35:22 +08:00
Xiao Xufeng
5b71b949be fix(startup): move rtc initialization before MSPI timing tuning to improve stability 2024-06-18 01:16:24 +08:00
wuzhenghui
e7046e2abf fix(esp_hw_support): fix bad logic in esp_perip_clk_init 2024-04-12 14:08:07 +08:00
wuzhenghui
4a64d2fe2c change(hal): control PAU bus clock by hal layer 2024-03-29 00:36:46 +08:00
Marius Vikhammer
42fc463c81 fix(console): fixed CONSOLE_NONE not working on C2/C3 2024-03-26 13:39:10 +08:00
Darian Leung
a77e5cc718 refactor(hal/usb): Remove usb_fsls_phy_ll.h 
For targets that only contain a USJ peripheral (and not a DWC OTG), their
'usb_fsls_phy_ll.h' headers only contain a single function
('usb_fsls_phy_ll_int_jtag_enable()') whose feature is already covered by
functions in 'usb_serial_jtag_ll.h'. Thus, this header is redundant.

This commit does the following:

- Remove 'usb_fsls_phy_ll.h' for targets that only contain a USJ peripheral
- Rename 'usb_fsls_phy_[hal|ll].[h|c]' to `usb_wrap_[hal|ll].[h|c]` for targets
that contain a DWC OTG peripheral. This better reflects the underlying peripheral
that the LL header accesses.
 2024-03-18 19:23:43 +08:00
Wu Zheng Hui
5a682c3bbb Merge branch 'feature/optimize_chips_active_power' into 'master' 
feat(system): Optimize the power consumption of esp32h2 and esp32c6 in the active state

Closes IDF-5658

See merge request espressif/esp-idf!27798
 2024-03-14 12:08:33 +08:00
Konstantin Kondrashov
3f89072af1 feat(all): Use PRIx macro in all logs 2024-03-12 11:15:53 +02:00
wuzhenghui
9e8e20227f feat(system): disable RNG module clock by default for save power 2024-03-12 10:10:41 +08:00
wuzhenghui
2a251982fc feat(system): add option to allow user disable assist_debug module to save power 2024-03-12 10:10:40 +08:00
wuzhenghui
b0fa4565a1 feat(system): add option to allow user disable USJ module to save power 2024-03-12 10:10:36 +08:00
wuzhenghui
85b246ac88 feat(system): gate the debug clock source by default for esp32c6 and esp32h2 2024-03-07 19:26:39 +08:00
wuzhenghui
f5707c6ab8 feat(system): gate the REF_TICK clock by default for esp32c6 and esp32h2 2024-03-07 19:26:38 +08:00
wuzhenghui
60e985e7af feat(system): gate the LP peripheral clock by default for esp32c6 and esp32h2 2024-03-07 19:26:38 +08:00
wuzhenghui
0528c8b4f4 feat(system): gate the HP peripheral clock by default for esp32c6 and esp32h2 2024-03-07 19:26:37 +08:00
liuning
3fa9c578f9 fix(clk): clear all lpclk source at clk init 2024-02-07 13:49:18 +08:00
Marius Vikhammer
06850e0e1e refactor(system): removed esp_system from astyle ignore list and reformated it 2024-01-30 15:17:15 +08:00
Song Ruo Jing
cf93777077 refactor(rtc): move soc/rtc.h from soc to esp_hw_support component 
Deprecated rtc_xtal_freq_t, replaced with soc_xtal_freq_t defined in
clk_tree_defs.h in soc component.
 2024-01-25 19:15:33 +08:00
Cao Sen Miao
6768805d20 fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions, 
Closes https://github.com/espressif/esp-idf/issues/12958
 2024-01-18 10:51:51 +08:00
wuzhenghui
8bc69e0354 fix(esp_system): increase esp32h2 slow clock calibration timeout watchdog threshold 2023-10-23 21:24:56 +08:00
morris
71cf16ec01 feat(gptimer): use RCC atomic block to enable/reset peripheral 2023-08-22 17:05:35 +08:00
Lou Tianhao
b5a293ab69 Power Management: support RC32K or Crystal32K powered down 2023-06-26 21:05:16 +08:00
Gustavo Henrique Nihei
3cbac3dd1d esp_system: Ensure TIMG0 clock is always enabled during normal operation 
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-06 04:58:11 +00:00
harshal.patil
04cc562180 mbedtls: enable RSA support for esp32h2 2023-03-01 14:18:57 +05:30
Song Ruo Jing
2c2a62e323 clk_tree: Add basic clock support for esp32h2 
- Support SOC ROOT clock source switch
- Support CPU frequency change
- Support RTC SLOW clock source switch
- Support RTC SLOW clock + RC FAST calibration

Remove FPGA build for esp32h2
 2023-02-20 17:15:02 +08:00
Song Ruo Jing
981d6a67b0 clk: Add basic clock support for esp32h2 2023-01-03 11:00:32 +08:00
Cao Sen Miao
8cc9260f86 ESP32H2: Add system support for ESP32H2 2022-12-07 11:38:51 +08:00
Cao Sen Miao
86aa4df5b5 ESP32-H2: Introduce new target for ESP32H2 2022-11-23 14:38:05 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00
jingli
60c1811433 esp_hw_support/clk_cali: remove redundant check for cali value 2022-09-21 03:03:25 +00:00
Guillaume Souchere
6005cc9163 hal: Deprecate interrupt_controller_hal.h, cpu_hal.h and cpu_ll.h interfaces 
This commit marks all functions in interrupt_controller_hal.h, cpu_ll.h and cpu_hal.h as deprecated.
Users should use functions from esp_cpu.h instead.
 2022-07-22 00:06:06 +08:00
KonstantinKondrashov
ac4c7d99fe dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
songruojing
a5b09cf015 rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in 
soc/clk_tree_defs.h
 2022-05-24 22:59:41 +08:00
Marius Vikhammer
d2872095f9 soc: moved kconfig options out of the target component. 
Moved the following kconfig options out of the target component:
 * CONFIG_ESP*_DEFAULT_CPU_FREQ* -> esp_system
 * ESP*_REV_MIN -> esp_hw_support
 * ESP*_TIME_SYSCALL -> newlib
 * ESP*_RTC_* -> esp_hw_support

Where applicable these target specific konfig names were merged into
a single common config, e.g;
CONFIG_ESP*_DEFAULT_CPU_FREQ -> CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
 2022-04-21 12:09:43 +08:00
Marius Vikhammer
ca3c056ac9 kconfig: replace deprecated options with new values 2022-03-15 16:28:53 +08:00
songruojing
c1dedb33fa esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset 2022-02-09 15:54:34 +08:00