/* * SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #include "sdkconfig.h" #include "esp_efuse.h" #include #include "esp_efuse_table.h" // md5_digest_table 39c442690c2273d557b5bb0db99fbe04 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. // To show efuse_table run the command 'show_efuse_table'. static const esp_efuse_desc_t WR_DIS[] = { {EFUSE_BLK0, 0, 32}, // [] Disable programming of individual eFuses, }; static const esp_efuse_desc_t WR_DIS_RD_DIS[] = { {EFUSE_BLK0, 0, 1}, // [] wr_dis of RD_DIS, }; static const esp_efuse_desc_t WR_DIS_KM_DISABLE_DEPLOY_MODE[] = { {EFUSE_BLK0, 1, 1}, // [] wr_dis of KM_DISABLE_DEPLOY_MODE, }; static const esp_efuse_desc_t WR_DIS_KM_RND_SWITCH_CYCLE[] = { {EFUSE_BLK0, 1, 1}, // [] wr_dis of KM_RND_SWITCH_CYCLE, }; static const esp_efuse_desc_t WR_DIS_KM_DEPLOY_ONLY_ONCE[] = { {EFUSE_BLK0, 1, 1}, // [] wr_dis of KM_DEPLOY_ONLY_ONCE, }; static const esp_efuse_desc_t WR_DIS_FORCE_USE_KEY_MANAGER_KEY[] = { {EFUSE_BLK0, 1, 1}, // [] wr_dis of FORCE_USE_KEY_MANAGER_KEY, }; static const esp_efuse_desc_t WR_DIS_FORCE_DISABLE_SW_INIT_KEY[] = { {EFUSE_BLK0, 1, 1}, // [] wr_dis of FORCE_DISABLE_SW_INIT_KEY, }; static const esp_efuse_desc_t WR_DIS_KM_XTS_KEY_LENGTH_256[] = { {EFUSE_BLK0, 1, 1}, // [] wr_dis of KM_XTS_KEY_LENGTH_256, }; static const esp_efuse_desc_t WR_DIS_LOCK_KM_KEY[] = { {EFUSE_BLK0, 1, 1}, // [] wr_dis of LOCK_KM_KEY, }; static const esp_efuse_desc_t WR_DIS_DIS_USB_JTAG[] = { {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_USB_JTAG, }; static const esp_efuse_desc_t WR_DIS_DIS_FORCE_DOWNLOAD[] = { {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_FORCE_DOWNLOAD, }; static const esp_efuse_desc_t WR_DIS_SPI_DOWNLOAD_MSPI_DIS[] = { {EFUSE_BLK0, 2, 1}, // [] wr_dis of SPI_DOWNLOAD_MSPI_DIS, }; static const esp_efuse_desc_t WR_DIS_DIS_TWAI[] = { {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_TWAI, }; static const esp_efuse_desc_t WR_DIS_JTAG_SEL_ENABLE[] = { {EFUSE_BLK0, 2, 1}, // [] wr_dis of JTAG_SEL_ENABLE, }; static const esp_efuse_desc_t WR_DIS_DIS_PAD_JTAG[] = { {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_PAD_JTAG, }; static const esp_efuse_desc_t WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = { {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT, }; static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = { {EFUSE_BLK0, 4, 1}, // [] wr_dis of SPI_BOOT_CRYPT_CNT, }; static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = { {EFUSE_BLK0, 5, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE0, }; static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = { {EFUSE_BLK0, 6, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE1, }; static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = { {EFUSE_BLK0, 7, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE2, }; static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_0[] = { {EFUSE_BLK0, 8, 1}, // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0, }; static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_1[] = { {EFUSE_BLK0, 9, 1}, // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1, }; static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_2[] = { {EFUSE_BLK0, 10, 1}, // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2, }; static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_3[] = { {EFUSE_BLK0, 11, 1}, // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3, }; static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_4[] = { {EFUSE_BLK0, 12, 1}, // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4, }; static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_5[] = { {EFUSE_BLK0, 13, 1}, // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5, }; static const esp_efuse_desc_t WR_DIS_SEC_DPA_LEVEL[] = { {EFUSE_BLK0, 14, 1}, // [] wr_dis of SEC_DPA_LEVEL, }; static const esp_efuse_desc_t WR_DIS_XTS_DPA_PSEUDO_LEVEL[] = { {EFUSE_BLK0, 14, 1}, // [] wr_dis of XTS_DPA_PSEUDO_LEVEL, }; static const esp_efuse_desc_t WR_DIS_XTS_DPA_CLK_ENABLE[] = { {EFUSE_BLK0, 14, 1}, // [] wr_dis of XTS_DPA_CLK_ENABLE, }; static const esp_efuse_desc_t WR_DIS_ECC_FORCE_CONST_TIME[] = { {EFUSE_BLK0, 14, 1}, // [] wr_dis of ECC_FORCE_CONST_TIME, }; static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = { {EFUSE_BLK0, 15, 1}, // [] wr_dis of SECURE_BOOT_EN, }; static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { {EFUSE_BLK0, 16, 1}, // [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE, }; static const esp_efuse_desc_t WR_DIS_FLASH_TPUW[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of FLASH_TPUW, }; static const esp_efuse_desc_t WR_DIS_DIS_DOWNLOAD_MODE[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_DOWNLOAD_MODE, }; static const esp_efuse_desc_t WR_DIS_DIS_DIRECT_BOOT[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_DIRECT_BOOT, }; static const esp_efuse_desc_t WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT, }; static const esp_efuse_desc_t WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE, }; static const esp_efuse_desc_t WR_DIS_ENABLE_SECURITY_DOWNLOAD[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of ENABLE_SECURITY_DOWNLOAD, }; static const esp_efuse_desc_t WR_DIS_UART_PRINT_CONTROL[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of UART_PRINT_CONTROL, }; static const esp_efuse_desc_t WR_DIS_FORCE_SEND_RESUME[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of FORCE_SEND_RESUME, }; static const esp_efuse_desc_t WR_DIS_SECURE_VERSION[] = { {EFUSE_BLK0, 18, 1}, // [] wr_dis of SECURE_VERSION, }; static const esp_efuse_desc_t WR_DIS_HUK_GEN_STATE[] = { {EFUSE_BLK0, 19, 1}, // [] wr_dis of HUK_GEN_STATE, }; static const esp_efuse_desc_t WR_DIS_BLK1[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLOCK1, }; static const esp_efuse_desc_t WR_DIS_MAC[] = { {EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC, }; static const esp_efuse_desc_t WR_DIS_MAC_EXT[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of MAC_EXT, }; static const esp_efuse_desc_t WR_DIS_PVT_LIMIT[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of PVT_LIMIT, }; static const esp_efuse_desc_t WR_DIS_PVT_CELL_SELECT[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of PVT_CELL_SELECT, }; static const esp_efuse_desc_t WR_DIS_PVT_PUMP_LIMIT[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of PVT_PUMP_LIMIT, }; static const esp_efuse_desc_t WR_DIS_PUMP_DRV[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of PUMP_DRV, }; static const esp_efuse_desc_t WR_DIS_WDT_DELAY_SEL[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of WDT_DELAY_SEL, }; static const esp_efuse_desc_t WR_DIS_HYS_EN_PAD[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of HYS_EN_PAD, }; static const esp_efuse_desc_t WR_DIS_PVT_GLITCH_CHARGE_RESET[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of PVT_GLITCH_CHARGE_RESET, }; static const esp_efuse_desc_t WR_DIS_VDD_SPI_LDO_ADJUST[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of VDD_SPI_LDO_ADJUST, }; static const esp_efuse_desc_t WR_DIS_FLASH_LDO_POWER_SEL[] = { {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_LDO_POWER_SEL, }; static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = { {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2, }; static const esp_efuse_desc_t WR_DIS_BLOCK_USR_DATA[] = { {EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA, }; static const esp_efuse_desc_t WR_DIS_CUSTOM_MAC[] = { {EFUSE_BLK0, 22, 1}, // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC, }; static const esp_efuse_desc_t WR_DIS_BLOCK_KEY0[] = { {EFUSE_BLK0, 23, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0, }; static const esp_efuse_desc_t WR_DIS_BLOCK_KEY1[] = { {EFUSE_BLK0, 24, 1}, // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1, }; static const esp_efuse_desc_t WR_DIS_BLOCK_KEY2[] = { {EFUSE_BLK0, 25, 1}, // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2, }; static const esp_efuse_desc_t WR_DIS_BLOCK_KEY3[] = { {EFUSE_BLK0, 26, 1}, // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3, }; static const esp_efuse_desc_t WR_DIS_BLOCK_KEY4[] = { {EFUSE_BLK0, 27, 1}, // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4, }; static const esp_efuse_desc_t WR_DIS_BLOCK_KEY5[] = { {EFUSE_BLK0, 28, 1}, // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5, }; static const esp_efuse_desc_t WR_DIS_BLOCK_SYS_DATA2[] = { {EFUSE_BLK0, 29, 1}, // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2, }; static const esp_efuse_desc_t WR_DIS_USB_EXCHG_PINS[] = { {EFUSE_BLK0, 30, 1}, // [] wr_dis of USB_EXCHG_PINS, }; static const esp_efuse_desc_t WR_DIS_SOFT_DIS_JTAG[] = { {EFUSE_BLK0, 31, 1}, // [] wr_dis of SOFT_DIS_JTAG, }; static const esp_efuse_desc_t RD_DIS[] = { {EFUSE_BLK0, 32, 7}, // [] Disable reading from BlOCK4-10, }; static const esp_efuse_desc_t RD_DIS_BLOCK_KEY0[] = { {EFUSE_BLK0, 32, 1}, // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0, }; static const esp_efuse_desc_t RD_DIS_BLOCK_KEY1[] = { {EFUSE_BLK0, 33, 1}, // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1, }; static const esp_efuse_desc_t RD_DIS_BLOCK_KEY2[] = { {EFUSE_BLK0, 34, 1}, // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2, }; static const esp_efuse_desc_t RD_DIS_BLOCK_KEY3[] = { {EFUSE_BLK0, 35, 1}, // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3, }; static const esp_efuse_desc_t RD_DIS_BLOCK_KEY4[] = { {EFUSE_BLK0, 36, 1}, // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4, }; static const esp_efuse_desc_t RD_DIS_BLOCK_KEY5[] = { {EFUSE_BLK0, 37, 1}, // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5, }; static const esp_efuse_desc_t RD_DIS_BLOCK_SYS_DATA2[] = { {EFUSE_BLK0, 38, 1}, // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2, }; static const esp_efuse_desc_t DIS_USB_JTAG[] = { {EFUSE_BLK0, 39, 1}, // [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled 0: enabled, }; static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = { {EFUSE_BLK0, 41, 1}, // [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled 0: enabled, }; static const esp_efuse_desc_t SPI_DOWNLOAD_MSPI_DIS[] = { {EFUSE_BLK0, 42, 1}, // [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled 0: enabled, }; static const esp_efuse_desc_t DIS_TWAI[] = { {EFUSE_BLK0, 43, 1}, // [] Represents whether TWAI function is disabled or enabled. 1: disabled 0: enabled, }; static const esp_efuse_desc_t JTAG_SEL_ENABLE[] = { {EFUSE_BLK0, 44, 1}, // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled 0: disabled, }; static const esp_efuse_desc_t DIS_PAD_JTAG[] = { {EFUSE_BLK0, 45, 1}, // [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled 0: enabled, }; static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = { {EFUSE_BLK0, 46, 1}, // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled 0: enabled, }; static const esp_efuse_desc_t PVT_GLITCH_EN[] = { {EFUSE_BLK0, 50, 1}, // [] Represents whether to enable PVT power glitch monitor function.1:Enable. 0:Disable, }; static const esp_efuse_desc_t PVT_GLITCH_MODE[] = { {EFUSE_BLK0, 52, 2}, // [] Use to configure glitch mode, }; static const esp_efuse_desc_t DIS_CORE1[] = { {EFUSE_BLK0, 54, 1}, // [] Represents whether the CPU-Core1 is disabled. 1: Disabled. 0: Not disable, }; static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = { {EFUSE_BLK0, 55, 3}, // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}, }; static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = { {EFUSE_BLK0, 58, 1}, // [] Revoke 1st secure boot key, }; static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = { {EFUSE_BLK0, 59, 1}, // [] Revoke 2nd secure boot key, }; static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = { {EFUSE_BLK0, 60, 1}, // [] Revoke 3rd secure boot key, }; static const esp_efuse_desc_t KEY_PURPOSE_0[] = { {EFUSE_BLK0, 64, 5}, // [KEY0_PURPOSE] Represents the purpose of Key0, }; static const esp_efuse_desc_t KEY_PURPOSE_1[] = { {EFUSE_BLK0, 69, 5}, // [KEY1_PURPOSE] Represents the purpose of Key1, }; static const esp_efuse_desc_t KEY_PURPOSE_2[] = { {EFUSE_BLK0, 74, 5}, // [KEY2_PURPOSE] Represents the purpose of Key2, }; static const esp_efuse_desc_t KEY_PURPOSE_3[] = { {EFUSE_BLK0, 79, 5}, // [KEY3_PURPOSE] Represents the purpose of Key3, }; static const esp_efuse_desc_t KEY_PURPOSE_4[] = { {EFUSE_BLK0, 84, 5}, // [KEY4_PURPOSE] Represents the purpose of Key4, }; static const esp_efuse_desc_t KEY_PURPOSE_5[] = { {EFUSE_BLK0, 89, 5}, // [KEY5_PURPOSE] Represents the purpose of Key5, }; static const esp_efuse_desc_t SEC_DPA_LEVEL[] = { {EFUSE_BLK0, 94, 2}, // [] Represents the spa secure level by configuring the clock random divide mode, }; static const esp_efuse_desc_t XTS_DPA_PSEUDO_LEVEL[] = { {EFUSE_BLK0, 96, 2}, // [] Represents the pseudo round level of xts-aes anti-dpa attack. 3: High. 2: Moderate 1. Low 0: Disabled, }; static const esp_efuse_desc_t XTS_DPA_CLK_ENABLE[] = { {EFUSE_BLK0, 98, 1}, // [] Represents whether xts-aes anti-dpa attack clock is enabled. 1. Enable. 0: Disable., }; static const esp_efuse_desc_t ECC_FORCE_CONST_TIME[] = { {EFUSE_BLK0, 99, 1}, // [] Represents whether to force ecc to use const-time calculation mode. 1: Enable. 0: Disable, }; static const esp_efuse_desc_t ECDSA_P384_ENABLE[] = { {EFUSE_BLK0, 100, 1}, // [] Represents if the chip supports ECDSA P384, }; static const esp_efuse_desc_t SECURE_BOOT_EN[] = { {EFUSE_BLK0, 101, 1}, // [] Represents whether secure boot is enabled or disabled. 1: enabled 0: disabled, }; static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = { {EFUSE_BLK0, 102, 1}, // [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled, }; static const esp_efuse_desc_t KM_DISABLE_DEPLOY_MODE[] = { {EFUSE_BLK0, 103, 5}, // [] Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled, }; static const esp_efuse_desc_t KM_RND_SWITCH_CYCLE[] = { {EFUSE_BLK0, 108, 2}, // [] Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles, }; static const esp_efuse_desc_t KM_DEPLOY_ONLY_ONCE[] = { {EFUSE_BLK0, 110, 5}, // [] Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once, }; static const esp_efuse_desc_t FORCE_USE_KEY_MANAGER_KEY[] = { {EFUSE_BLK0, 115, 5}, // [] Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager, }; static const esp_efuse_desc_t FORCE_DISABLE_SW_INIT_KEY[] = { {EFUSE_BLK0, 120, 1}, // [] Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable, }; static const esp_efuse_desc_t KM_XTS_KEY_LENGTH_256[] = { {EFUSE_BLK0, 121, 1}, // [] Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key, }; static const esp_efuse_desc_t LOCK_KM_KEY[] = { {EFUSE_BLK0, 122, 1}, // [] Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked, }; static const esp_efuse_desc_t FLASH_TPUW[] = { {EFUSE_BLK0, 123, 3}, // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value, }; static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = { {EFUSE_BLK0, 127, 1}, // [] Represents whether Download mode is disabled or enabled. 1: disabled 0: enabled, }; static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = { {EFUSE_BLK0, 128, 1}, // [] Represents whether direct boot mode is disabled or enabled. 1: disabled 0: enabled, }; static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { {EFUSE_BLK0, 129, 1}, // [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled 0: enabled, }; static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { {EFUSE_BLK0, 130, 1}, // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable, }; static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = { {EFUSE_BLK0, 131, 1}, // [] Represents whether security download is enabled or disabled. 1: enabled 0: disabled, }; static const esp_efuse_desc_t UART_PRINT_CONTROL[] = { {EFUSE_BLK0, 132, 2}, // [] Represents the type of UART printing. 00: force enable printing 01: enable printing when GPIO8 is reset at low level 10: enable printing when GPIO8 is reset at high level 11: force disable printing, }; static const esp_efuse_desc_t FORCE_SEND_RESUME[] = { {EFUSE_BLK0, 134, 1}, // [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced 0:not forced, }; static const esp_efuse_desc_t SECURE_VERSION[] = { {EFUSE_BLK0, 135, 16}, // [] Represents the version used by ESP-IDF anti-rollback feature, }; static const esp_efuse_desc_t HUK_GEN_STATE[] = { {EFUSE_BLK0, 151, 5}, // [] Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid, }; static const esp_efuse_desc_t FLASH_LDO_EFUSE_SEL[] = { {EFUSE_BLK0, 156, 1}, // [] Represents whether to select efuse control flash ldo default voltage. 1 : efuse 0 : strapping, }; static const esp_efuse_desc_t USB_EXCHG_PINS[] = { {EFUSE_BLK0, 168, 1}, // [] Represents whether the D+ and D- pins of USB_SERIAL_JTAG PHY is exchanged. 1: exchanged 0: not exchanged, }; static const esp_efuse_desc_t USB_OTG_FS_EXCHG_PINS[] = { {EFUSE_BLK0, 169, 1}, // [] Represents whether the D+ and D- pins of USB_OTG_FS PHY is exchanged. 1: exchanged 0: not exchanged, }; static const esp_efuse_desc_t USB_PHY_SEL[] = { {EFUSE_BLK0, 170, 1}, // [] Represents whether to exchange the USB_SERIAL_JTAG PHY with USB_OTG_FS PHY. 1: exchanged. 0: not exchanged, }; static const esp_efuse_desc_t SOFT_DIS_JTAG[] = { {EFUSE_BLK0, 171, 3}, // [] Represents whether JTAG is disabled in soft way. Odd number: disabled Even number: enabled, }; static const esp_efuse_desc_t IO_LDO_ADJUST[] = { {EFUSE_BLK0, 174, 8}, // [] Represents configuration of IO LDO mode and voltage., }; static const esp_efuse_desc_t IO_LDO_1P8[] = { {EFUSE_BLK0, 182, 1}, // [] Represents select IO LDO voltage to 1.8V or 3.3V. 1: 1.8V 0: 3.3V, }; static const esp_efuse_desc_t DCDC_CCM_EN[] = { {EFUSE_BLK0, 183, 1}, // [] Represents whether change DCDC to CCM mode, }; static const esp_efuse_desc_t MAC[] = { {EFUSE_BLK1, 40, 8}, // [MAC_FACTORY] MAC address, {EFUSE_BLK1, 32, 8}, // [MAC_FACTORY] MAC address, {EFUSE_BLK1, 24, 8}, // [MAC_FACTORY] MAC address, {EFUSE_BLK1, 16, 8}, // [MAC_FACTORY] MAC address, {EFUSE_BLK1, 8, 8}, // [MAC_FACTORY] MAC address, {EFUSE_BLK1, 0, 8}, // [MAC_FACTORY] MAC address, }; static const esp_efuse_desc_t MAC_EXT[] = { {EFUSE_BLK1, 56, 8}, // [] Stores the extended bits of MAC address, {EFUSE_BLK1, 48, 8}, // [] Stores the extended bits of MAC address, }; static const esp_efuse_desc_t PVT_LIMIT[] = { {EFUSE_BLK1, 64, 16}, // [] Power glitch monitor threthold, }; static const esp_efuse_desc_t PVT_CELL_SELECT[] = { {EFUSE_BLK1, 80, 7}, // [] Power glitch monitor PVT cell select, }; static const esp_efuse_desc_t PVT_PUMP_LIMIT[] = { {EFUSE_BLK1, 87, 8}, // [] Use to configure voltage monitor limit for charge pump, }; static const esp_efuse_desc_t PUMP_DRV[] = { {EFUSE_BLK1, 96, 4}, // [] Use to configure charge pump voltage gain, }; static const esp_efuse_desc_t WDT_DELAY_SEL[] = { {EFUSE_BLK1, 100, 2}, // [] Represents the threshold level of the RTC watchdog STG0 timeout. 0: Original threshold configuration value of STG0 *2 1: Original threshold configuration value of STG0 *4 2: Original threshold configuration value of STG0 *8 3: Original threshold configuration value of STG0 *16, }; static const esp_efuse_desc_t HYS_EN_PAD[] = { {EFUSE_BLK1, 102, 1}, // [] Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled 0:disabled, }; static const esp_efuse_desc_t PVT_GLITCH_CHARGE_RESET[] = { {EFUSE_BLK1, 103, 1}, // [] Represents whether to trigger reset or charge pump when PVT power glitch happened.1:Trigger charge pump. 0:Trigger reset, }; static const esp_efuse_desc_t VDD_SPI_LDO_ADJUST[] = { {EFUSE_BLK1, 105, 8}, // [] Represents configuration of FLASH LDO mode and voltage., }; static const esp_efuse_desc_t FLASH_LDO_POWER_SEL[] = { {EFUSE_BLK1, 113, 1}, // [] Represents which flash ldo be select: 1: FLASH LDO 1P2 0 : FLASH LDO 1P8, }; static const esp_efuse_desc_t USER_DATA[] = { {EFUSE_BLK3, 0, 256}, // [BLOCK_USR_DATA] User data, }; static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = { {EFUSE_BLK3, 200, 48}, // [MAC_CUSTOM CUSTOM_MAC] Custom MAC, }; static const esp_efuse_desc_t KEY0[] = { {EFUSE_BLK4, 0, 256}, // [BLOCK_KEY0] Key0 or user data, }; static const esp_efuse_desc_t KEY1[] = { {EFUSE_BLK5, 0, 256}, // [BLOCK_KEY1] Key1 or user data, }; static const esp_efuse_desc_t KEY2[] = { {EFUSE_BLK6, 0, 256}, // [BLOCK_KEY2] Key2 or user data, }; static const esp_efuse_desc_t KEY3[] = { {EFUSE_BLK7, 0, 256}, // [BLOCK_KEY3] Key3 or user data, }; static const esp_efuse_desc_t KEY4[] = { {EFUSE_BLK8, 0, 256}, // [BLOCK_KEY4] Key4 or user data, }; static const esp_efuse_desc_t KEY5[] = { {EFUSE_BLK9, 0, 256}, // [BLOCK_KEY5] Key5 or user data, }; static const esp_efuse_desc_t SYS_DATA_PART2[] = { {EFUSE_BLK10, 0, 256}, // [BLOCK_SYS_DATA2] System data part 2 (reserved), }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[] = { &WR_DIS[0], // [] Disable programming of individual eFuses NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = { &WR_DIS_RD_DIS[0], // [] wr_dis of RD_DIS NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KM_DISABLE_DEPLOY_MODE[] = { &WR_DIS_KM_DISABLE_DEPLOY_MODE[0], // [] wr_dis of KM_DISABLE_DEPLOY_MODE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KM_RND_SWITCH_CYCLE[] = { &WR_DIS_KM_RND_SWITCH_CYCLE[0], // [] wr_dis of KM_RND_SWITCH_CYCLE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KM_DEPLOY_ONLY_ONCE[] = { &WR_DIS_KM_DEPLOY_ONLY_ONCE[0], // [] wr_dis of KM_DEPLOY_ONLY_ONCE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FORCE_USE_KEY_MANAGER_KEY[] = { &WR_DIS_FORCE_USE_KEY_MANAGER_KEY[0], // [] wr_dis of FORCE_USE_KEY_MANAGER_KEY NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FORCE_DISABLE_SW_INIT_KEY[] = { &WR_DIS_FORCE_DISABLE_SW_INIT_KEY[0], // [] wr_dis of FORCE_DISABLE_SW_INIT_KEY NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KM_XTS_KEY_LENGTH_256[] = { &WR_DIS_KM_XTS_KEY_LENGTH_256[0], // [] wr_dis of KM_XTS_KEY_LENGTH_256 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_LOCK_KM_KEY[] = { &WR_DIS_LOCK_KM_KEY[0], // [] wr_dis of LOCK_KM_KEY NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_USB_JTAG[] = { &WR_DIS_DIS_USB_JTAG[0], // [] wr_dis of DIS_USB_JTAG NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_FORCE_DOWNLOAD[] = { &WR_DIS_DIS_FORCE_DOWNLOAD[0], // [] wr_dis of DIS_FORCE_DOWNLOAD NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_DOWNLOAD_MSPI_DIS[] = { &WR_DIS_SPI_DOWNLOAD_MSPI_DIS[0], // [] wr_dis of SPI_DOWNLOAD_MSPI_DIS NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_TWAI[] = { &WR_DIS_DIS_TWAI[0], // [] wr_dis of DIS_TWAI NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_JTAG_SEL_ENABLE[] = { &WR_DIS_JTAG_SEL_ENABLE[0], // [] wr_dis of JTAG_SEL_ENABLE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_PAD_JTAG[] = { &WR_DIS_DIS_PAD_JTAG[0], // [] wr_dis of DIS_PAD_JTAG NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = { &WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = { &WR_DIS_SPI_BOOT_CRYPT_CNT[0], // [] wr_dis of SPI_BOOT_CRYPT_CNT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = { &WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE0 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = { &WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE1 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = { &WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_0[] = { &WR_DIS_KEY_PURPOSE_0[0], // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_1[] = { &WR_DIS_KEY_PURPOSE_1[0], // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_2[] = { &WR_DIS_KEY_PURPOSE_2[0], // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_3[] = { &WR_DIS_KEY_PURPOSE_3[0], // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_4[] = { &WR_DIS_KEY_PURPOSE_4[0], // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_5[] = { &WR_DIS_KEY_PURPOSE_5[0], // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SEC_DPA_LEVEL[] = { &WR_DIS_SEC_DPA_LEVEL[0], // [] wr_dis of SEC_DPA_LEVEL NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_XTS_DPA_PSEUDO_LEVEL[] = { &WR_DIS_XTS_DPA_PSEUDO_LEVEL[0], // [] wr_dis of XTS_DPA_PSEUDO_LEVEL NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_XTS_DPA_CLK_ENABLE[] = { &WR_DIS_XTS_DPA_CLK_ENABLE[0], // [] wr_dis of XTS_DPA_CLK_ENABLE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ECC_FORCE_CONST_TIME[] = { &WR_DIS_ECC_FORCE_CONST_TIME[0], // [] wr_dis of ECC_FORCE_CONST_TIME NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = { &WR_DIS_SECURE_BOOT_EN[0], // [] wr_dis of SECURE_BOOT_EN NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { &WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[0], // [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TPUW[] = { &WR_DIS_FLASH_TPUW[0], // [] wr_dis of FLASH_TPUW NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_DOWNLOAD_MODE[] = { &WR_DIS_DIS_DOWNLOAD_MODE[0], // [] wr_dis of DIS_DOWNLOAD_MODE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_DIRECT_BOOT[] = { &WR_DIS_DIS_DIRECT_BOOT[0], // [] wr_dis of DIS_DIRECT_BOOT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { &WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // [] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { &WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ENABLE_SECURITY_DOWNLOAD[] = { &WR_DIS_ENABLE_SECURITY_DOWNLOAD[0], // [] wr_dis of ENABLE_SECURITY_DOWNLOAD NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_UART_PRINT_CONTROL[] = { &WR_DIS_UART_PRINT_CONTROL[0], // [] wr_dis of UART_PRINT_CONTROL NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FORCE_SEND_RESUME[] = { &WR_DIS_FORCE_SEND_RESUME[0], // [] wr_dis of FORCE_SEND_RESUME NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_VERSION[] = { &WR_DIS_SECURE_VERSION[0], // [] wr_dis of SECURE_VERSION NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_HUK_GEN_STATE[] = { &WR_DIS_HUK_GEN_STATE[0], // [] wr_dis of HUK_GEN_STATE NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = { &WR_DIS_BLK1[0], // [] wr_dis of BLOCK1 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[] = { &WR_DIS_MAC[0], // [WR_DIS.MAC_FACTORY] wr_dis of MAC NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[] = { &WR_DIS_MAC_EXT[0], // [] wr_dis of MAC_EXT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PVT_LIMIT[] = { &WR_DIS_PVT_LIMIT[0], // [] wr_dis of PVT_LIMIT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PVT_CELL_SELECT[] = { &WR_DIS_PVT_CELL_SELECT[0], // [] wr_dis of PVT_CELL_SELECT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PVT_PUMP_LIMIT[] = { &WR_DIS_PVT_PUMP_LIMIT[0], // [] wr_dis of PVT_PUMP_LIMIT NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PUMP_DRV[] = { &WR_DIS_PUMP_DRV[0], // [] wr_dis of PUMP_DRV NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WDT_DELAY_SEL[] = { &WR_DIS_WDT_DELAY_SEL[0], // [] wr_dis of WDT_DELAY_SEL NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_HYS_EN_PAD[] = { &WR_DIS_HYS_EN_PAD[0], // [] wr_dis of HYS_EN_PAD NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PVT_GLITCH_CHARGE_RESET[] = { &WR_DIS_PVT_GLITCH_CHARGE_RESET[0], // [] wr_dis of PVT_GLITCH_CHARGE_RESET NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_VDD_SPI_LDO_ADJUST[] = { &WR_DIS_VDD_SPI_LDO_ADJUST[0], // [] wr_dis of VDD_SPI_LDO_ADJUST NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_LDO_POWER_SEL[] = { &WR_DIS_FLASH_LDO_POWER_SEL[0], // [] wr_dis of FLASH_LDO_POWER_SEL NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = { &WR_DIS_SYS_DATA_PART1[0], // [] wr_dis of BLOCK2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[] = { &WR_DIS_BLOCK_USR_DATA[0], // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_CUSTOM_MAC[] = { &WR_DIS_CUSTOM_MAC[0], // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[] = { &WR_DIS_BLOCK_KEY0[0], // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY1[] = { &WR_DIS_BLOCK_KEY1[0], // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY2[] = { &WR_DIS_BLOCK_KEY2[0], // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY3[] = { &WR_DIS_BLOCK_KEY3[0], // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY4[] = { &WR_DIS_BLOCK_KEY4[0], // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY5[] = { &WR_DIS_BLOCK_KEY5[0], // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_SYS_DATA2[] = { &WR_DIS_BLOCK_SYS_DATA2[0], // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USB_EXCHG_PINS[] = { &WR_DIS_USB_EXCHG_PINS[0], // [] wr_dis of USB_EXCHG_PINS NULL }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SOFT_DIS_JTAG[] = { &WR_DIS_SOFT_DIS_JTAG[0], // [] wr_dis of SOFT_DIS_JTAG NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[] = { &RD_DIS[0], // [] Disable reading from BlOCK4-10 NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY0[] = { &RD_DIS_BLOCK_KEY0[0], // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0 NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY1[] = { &RD_DIS_BLOCK_KEY1[0], // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1 NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY2[] = { &RD_DIS_BLOCK_KEY2[0], // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY3[] = { &RD_DIS_BLOCK_KEY3[0], // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3 NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY4[] = { &RD_DIS_BLOCK_KEY4[0], // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4 NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY5[] = { &RD_DIS_BLOCK_KEY5[0], // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5 NULL }; const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_SYS_DATA2[] = { &RD_DIS_BLOCK_SYS_DATA2[0], // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[] = { &DIS_USB_JTAG[0], // [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = { &DIS_FORCE_DOWNLOAD[0], // [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_SPI_DOWNLOAD_MSPI_DIS[] = { &SPI_DOWNLOAD_MSPI_DIS[0], // [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_TWAI[] = { &DIS_TWAI[0], // [] Represents whether TWAI function is disabled or enabled. 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[] = { &JTAG_SEL_ENABLE[0], // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled 0: disabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[] = { &DIS_PAD_JTAG[0], // [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = { &DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_PVT_GLITCH_EN[] = { &PVT_GLITCH_EN[0], // [] Represents whether to enable PVT power glitch monitor function.1:Enable. 0:Disable NULL }; const esp_efuse_desc_t* ESP_EFUSE_PVT_GLITCH_MODE[] = { &PVT_GLITCH_MODE[0], // [] Use to configure glitch mode NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_CORE1[] = { &DIS_CORE1[0], // [] Represents whether the CPU-Core1 is disabled. 1: Disabled. 0: Not disable NULL }; const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = { &SPI_BOOT_CRYPT_CNT[0], // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"} NULL }; const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = { &SECURE_BOOT_KEY_REVOKE0[0], // [] Revoke 1st secure boot key NULL }; const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = { &SECURE_BOOT_KEY_REVOKE1[0], // [] Revoke 2nd secure boot key NULL }; const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = { &SECURE_BOOT_KEY_REVOKE2[0], // [] Revoke 3rd secure boot key NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = { &KEY_PURPOSE_0[0], // [KEY0_PURPOSE] Represents the purpose of Key0 NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = { &KEY_PURPOSE_1[0], // [KEY1_PURPOSE] Represents the purpose of Key1 NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = { &KEY_PURPOSE_2[0], // [KEY2_PURPOSE] Represents the purpose of Key2 NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = { &KEY_PURPOSE_3[0], // [KEY3_PURPOSE] Represents the purpose of Key3 NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = { &KEY_PURPOSE_4[0], // [KEY4_PURPOSE] Represents the purpose of Key4 NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = { &KEY_PURPOSE_5[0], // [KEY5_PURPOSE] Represents the purpose of Key5 NULL }; const esp_efuse_desc_t* ESP_EFUSE_SEC_DPA_LEVEL[] = { &SEC_DPA_LEVEL[0], // [] Represents the spa secure level by configuring the clock random divide mode NULL }; const esp_efuse_desc_t* ESP_EFUSE_XTS_DPA_PSEUDO_LEVEL[] = { &XTS_DPA_PSEUDO_LEVEL[0], // [] Represents the pseudo round level of xts-aes anti-dpa attack. 3: High. 2: Moderate 1. Low 0: Disabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_XTS_DPA_CLK_ENABLE[] = { &XTS_DPA_CLK_ENABLE[0], // [] Represents whether xts-aes anti-dpa attack clock is enabled. 1. Enable. 0: Disable. NULL }; const esp_efuse_desc_t* ESP_EFUSE_ECC_FORCE_CONST_TIME[] = { &ECC_FORCE_CONST_TIME[0], // [] Represents whether to force ecc to use const-time calculation mode. 1: Enable. 0: Disable NULL }; const esp_efuse_desc_t* ESP_EFUSE_ECDSA_P384_ENABLE[] = { &ECDSA_P384_ENABLE[0], // [] Represents if the chip supports ECDSA P384 NULL }; const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = { &SECURE_BOOT_EN[0], // [] Represents whether secure boot is enabled or disabled. 1: enabled 0: disabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { &SECURE_BOOT_AGGRESSIVE_REVOKE[0], // [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_KM_DISABLE_DEPLOY_MODE[] = { &KM_DISABLE_DEPLOY_MODE[0], // [] Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_KM_RND_SWITCH_CYCLE[] = { &KM_RND_SWITCH_CYCLE[0], // [] Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles NULL }; const esp_efuse_desc_t* ESP_EFUSE_KM_DEPLOY_ONLY_ONCE[] = { &KM_DEPLOY_ONLY_ONCE[0], // [] Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once NULL }; const esp_efuse_desc_t* ESP_EFUSE_FORCE_USE_KEY_MANAGER_KEY[] = { &FORCE_USE_KEY_MANAGER_KEY[0], // [] Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager NULL }; const esp_efuse_desc_t* ESP_EFUSE_FORCE_DISABLE_SW_INIT_KEY[] = { &FORCE_DISABLE_SW_INIT_KEY[0], // [] Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable NULL }; const esp_efuse_desc_t* ESP_EFUSE_KM_XTS_KEY_LENGTH_256[] = { &KM_XTS_KEY_LENGTH_256[0], // [] Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key NULL }; const esp_efuse_desc_t* ESP_EFUSE_LOCK_KM_KEY[] = { &LOCK_KM_KEY[0], // [] Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked NULL }; const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = { &FLASH_TPUW[0], // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = { &DIS_DOWNLOAD_MODE[0], // [] Represents whether Download mode is disabled or enabled. 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = { &DIS_DIRECT_BOOT[0], // [] Represents whether direct boot mode is disabled or enabled. 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { &DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled 0: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { &DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable NULL }; const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = { &ENABLE_SECURITY_DOWNLOAD[0], // [] Represents whether security download is enabled or disabled. 1: enabled 0: disabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = { &UART_PRINT_CONTROL[0], // [] Represents the type of UART printing. 00: force enable printing 01: enable printing when GPIO8 is reset at low level 10: enable printing when GPIO8 is reset at high level 11: force disable printing NULL }; const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = { &FORCE_SEND_RESUME[0], // [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced 0:not forced NULL }; const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = { &SECURE_VERSION[0], // [] Represents the version used by ESP-IDF anti-rollback feature NULL }; const esp_efuse_desc_t* ESP_EFUSE_HUK_GEN_STATE[] = { &HUK_GEN_STATE[0], // [] Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid NULL }; const esp_efuse_desc_t* ESP_EFUSE_FLASH_LDO_EFUSE_SEL[] = { &FLASH_LDO_EFUSE_SEL[0], // [] Represents whether to select efuse control flash ldo default voltage. 1 : efuse 0 : strapping NULL }; const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = { &USB_EXCHG_PINS[0], // [] Represents whether the D+ and D- pins of USB_SERIAL_JTAG PHY is exchanged. 1: exchanged 0: not exchanged NULL }; const esp_efuse_desc_t* ESP_EFUSE_USB_OTG_FS_EXCHG_PINS[] = { &USB_OTG_FS_EXCHG_PINS[0], // [] Represents whether the D+ and D- pins of USB_OTG_FS PHY is exchanged. 1: exchanged 0: not exchanged NULL }; const esp_efuse_desc_t* ESP_EFUSE_USB_PHY_SEL[] = { &USB_PHY_SEL[0], // [] Represents whether to exchange the USB_SERIAL_JTAG PHY with USB_OTG_FS PHY. 1: exchanged. 0: not exchanged NULL }; const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = { &SOFT_DIS_JTAG[0], // [] Represents whether JTAG is disabled in soft way. Odd number: disabled Even number: enabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_IO_LDO_ADJUST[] = { &IO_LDO_ADJUST[0], // [] Represents configuration of IO LDO mode and voltage. NULL }; const esp_efuse_desc_t* ESP_EFUSE_IO_LDO_1P8[] = { &IO_LDO_1P8[0], // [] Represents select IO LDO voltage to 1.8V or 3.3V. 1: 1.8V 0: 3.3V NULL }; const esp_efuse_desc_t* ESP_EFUSE_DCDC_CCM_EN[] = { &DCDC_CCM_EN[0], // [] Represents whether change DCDC to CCM mode NULL }; const esp_efuse_desc_t* ESP_EFUSE_MAC[] = { &MAC[0], // [MAC_FACTORY] MAC address &MAC[1], // [MAC_FACTORY] MAC address &MAC[2], // [MAC_FACTORY] MAC address &MAC[3], // [MAC_FACTORY] MAC address &MAC[4], // [MAC_FACTORY] MAC address &MAC[5], // [MAC_FACTORY] MAC address NULL }; const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = { &MAC_EXT[0], // [] Stores the extended bits of MAC address &MAC_EXT[1], // [] Stores the extended bits of MAC address NULL }; const esp_efuse_desc_t* ESP_EFUSE_PVT_LIMIT[] = { &PVT_LIMIT[0], // [] Power glitch monitor threthold NULL }; const esp_efuse_desc_t* ESP_EFUSE_PVT_CELL_SELECT[] = { &PVT_CELL_SELECT[0], // [] Power glitch monitor PVT cell select NULL }; const esp_efuse_desc_t* ESP_EFUSE_PVT_PUMP_LIMIT[] = { &PVT_PUMP_LIMIT[0], // [] Use to configure voltage monitor limit for charge pump NULL }; const esp_efuse_desc_t* ESP_EFUSE_PUMP_DRV[] = { &PUMP_DRV[0], // [] Use to configure charge pump voltage gain NULL }; const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = { &WDT_DELAY_SEL[0], // [] Represents the threshold level of the RTC watchdog STG0 timeout. 0: Original threshold configuration value of STG0 *2 1: Original threshold configuration value of STG0 *4 2: Original threshold configuration value of STG0 *8 3: Original threshold configuration value of STG0 *16 NULL }; const esp_efuse_desc_t* ESP_EFUSE_HYS_EN_PAD[] = { &HYS_EN_PAD[0], // [] Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled 0:disabled NULL }; const esp_efuse_desc_t* ESP_EFUSE_PVT_GLITCH_CHARGE_RESET[] = { &PVT_GLITCH_CHARGE_RESET[0], // [] Represents whether to trigger reset or charge pump when PVT power glitch happened.1:Trigger charge pump. 0:Trigger reset NULL }; const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_LDO_ADJUST[] = { &VDD_SPI_LDO_ADJUST[0], // [] Represents configuration of FLASH LDO mode and voltage. NULL }; const esp_efuse_desc_t* ESP_EFUSE_FLASH_LDO_POWER_SEL[] = { &FLASH_LDO_POWER_SEL[0], // [] Represents which flash ldo be select: 1: FLASH LDO 1P2 0 : FLASH LDO 1P8 NULL }; const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = { &USER_DATA[0], // [BLOCK_USR_DATA] User data NULL }; const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = { &USER_DATA_MAC_CUSTOM[0], // [MAC_CUSTOM CUSTOM_MAC] Custom MAC NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = { &KEY0[0], // [BLOCK_KEY0] Key0 or user data NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = { &KEY1[0], // [BLOCK_KEY1] Key1 or user data NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = { &KEY2[0], // [BLOCK_KEY2] Key2 or user data NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = { &KEY3[0], // [BLOCK_KEY3] Key3 or user data NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = { &KEY4[0], // [BLOCK_KEY4] Key4 or user data NULL }; const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = { &KEY5[0], // [BLOCK_KEY5] Key5 or user data NULL }; const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = { &SYS_DATA_PART2[0], // [BLOCK_SYS_DATA2] System data part 2 (reserved) NULL };