mirror of
https://github.com/espressif/esp-idf.git
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230ee88d99
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency normally, while automatically reducing CPU frequency during encrypted flash writes to ensure correct operation. The frequency limit is chip revision dependent: - v1.2 and above: limited to 160MHz during encrypted writes - v1.0 and below: limited to 80MHz during encrypted writes Key implementation details: - Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called - Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer - Works with both PM enabled and disabled configurations - Frequency is automatically restored after encrypted write completes - For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when CPU frequency is reduced to 80MHz - SPI1 timing registers are configured during frequency switching since encrypted writes use SPI1 and must work correctly at reduced CPU frequencies Code improvements: - Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks - Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of hardcoded macros - Add comprehensive test cases covering various PM configurations and edge cases This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance while maintaining reliable encrypted flash write functionality.
133 lines
4.1 KiB
C
133 lines
4.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_err.h"
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_private/spi_share_hw_ctrl.h"
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#include "sdkconfig.h"
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#include "esp_flash.h"
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/** Internal API, don't use in the applications */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @brief Initialise the default SPI flash chip
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*
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* Called by OS startup code. You do not need to call this in your own applications.
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*/
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esp_err_t esp_flash_init_default_chip(void);
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/**
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* Enable OS-level SPI flash protections in IDF
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*
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* Called by OS startup code. You do not need to call this in your own applications.
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*
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* @return ESP_OK if success, otherwise failed. See return value of ``esp_flash_init_os_functions``.
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*/
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esp_err_t esp_flash_app_init(void);
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/**
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* Disable (or enable) OS-level SPI flash protections in IDF
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*
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* Called by the IDF internal code (e.g. coredump). You do not need to call this in your own applications.
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*
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* @return always ESP_OK.
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*/
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esp_err_t esp_flash_app_disable_protect(bool disable);
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/**
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* Initialize OS-level functions for a specific chip.
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*
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* @param chip The chip to init os functions.
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* @param host_id Which SPI host to use, 1 for SPI1, 2 for SPI2 (HSPI), 3 for SPI3 (VSPI)
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* @param dev_handle SPI bus lock device handle to acquire during flash operations
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*
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* @return
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* - ESP_OK if success
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* - ESP_ERR_INVALID_ARG if host_id is invalid
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*/
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esp_err_t esp_flash_init_os_functions(esp_flash_t *chip, int host_id, spi_bus_lock_dev_handle_t dev_handle);
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/**
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* @brief Deinitialize OS-level functions
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*
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* @param chip The chip to deinit os functions
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* @param out_dev_handle The SPI bus lock passed from `esp_flash_init_os_functions`. The caller should deinitialize
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* the lock.
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* @return always ESP_OK.
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*/
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esp_err_t esp_flash_deinit_os_functions(esp_flash_t* chip, spi_bus_lock_dev_handle_t* out_dev_handle);
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/**
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* @brief Initialize the bus lock on the SPI1 bus. Should be called if drivers (including esp_flash)
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* wants to use SPI1 bus.
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*
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* @note When using legacy spi flash API, the bus lock will not be available on SPI1 bus.
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*
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* @return esp_err_t always ESP_OK.
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*/
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esp_err_t esp_flash_init_main_bus_lock(void);
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/**
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* Initialize OS-level functions for the main flash chip.
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*
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* @param chip The chip to init os functions. Only pointer to the default chip is supported now.
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*
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* @return always ESP_OK
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*/
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esp_err_t esp_flash_app_enable_os_functions(esp_flash_t* chip);
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/**
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* Disable OS-level functions for the main flash chip during special phases (e.g. coredump)
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*
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* @param chip The chip to init os functions. Only "esp_flash_default_chip" is supported now.
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*
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* @return always ESP_OK
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*/
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esp_err_t esp_flash_app_disable_os_functions(esp_flash_t* chip);
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/**
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* @brief Set or clear dangerous write protection check on the flash chip.
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*
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* This function sets the runtime option to allow or disallow writing to
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* dangerous areas such as the bootloader and partition table. If
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* CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set, this function allows
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* the caller to toggle the protection for specific areas.
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*
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* If CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is set, there is no protection
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* check in the system, and this function does nothing.
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*
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* @param chip The flash chip on which to set the write protection. Only
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* "esp_flash_default_chip" is supported.
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* @param protect Set to true to enable protection against writing in dangerous
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* areas (bootloader, partition table). Set to false to disable
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* the protection.
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* @return
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* - ESP_OK: Successful operation.
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* - ESP_ERR_INVALID_ARG: The chip argument is null.
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*/
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esp_err_t esp_flash_set_dangerous_write_protection(esp_flash_t *chip, const bool protect);
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#if CONFIG_SPI_FLASH_ROM_IMPL
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/**
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* @brief Initialize ROM API functions structure
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*
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* This function initializes the ROM API functions structure, either by pointing
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* to a custom structure or by patching the ROM structure in RAM.
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*/
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void esp_flash_rom_api_funcs_init(void);
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#endif // CONFIG_SPI_FLASH_ROM_IMPL
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#ifdef __cplusplus
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}
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#endif
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