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64 lines
3.6 KiB
Plaintext
64 lines
3.6 KiB
Plaintext
menu "Legacy TWAI Driver Configurations"
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depends on SOC_TWAI_SUPPORTED
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config TWAI_SKIP_LEGACY_CONFLICT_CHECK
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bool "Skip legacy driver conflict check"
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default n
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help
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This configuration option used to bypass the conflict check mechanism with legacy code.
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config TWAI_ERRATA_FIX_BUS_OFF_REC
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bool "Add SW workaround for REC change during bus-off"
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depends on IDF_TARGET_ESP32
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default y
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help
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When the bus-off condition is reached, the REC should be reset to 0 and frozen (via LOM) by the
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driver's ISR. However on the ESP32, there is an edge case where the REC will increase before the
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driver's ISR can respond in time (e.g., due to the rapid occurrence of bus errors), thus causing the
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REC to be non-zero after bus-off. A non-zero REC can prevent bus-off recovery as the bus-off recovery
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condition is that both TEC and REC become 0. Enabling this option will add a workaround in the driver
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to forcibly reset REC to zero on reaching bus-off.
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config TWAI_ERRATA_FIX_TX_INTR_LOST
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bool "Add SW workaround for TX interrupt lost errata"
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depends on IDF_TARGET_ESP32
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default y
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help
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On the ESP32, when a transmit interrupt occurs, and interrupt register is read on the same APB clock
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cycle, the transmit interrupt could be lost. Enabling this option will add a workaround that checks the
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transmit buffer status bit to recover any lost transmit interrupt.
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config TWAI_ERRATA_FIX_RX_FRAME_INVALID
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bool "Add SW workaround for invalid RX frame errata"
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depends on IDF_TARGET_ESP32
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default y
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help
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On the ESP32, when receiving a data or remote frame, if a bus error occurs in the data or CRC field,
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the data of the next received frame could be invalid. Enabling this option will add a workaround that
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will reset the peripheral on detection of this errata condition. Note that if a frame is transmitted on
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the bus whilst the reset is ongoing, the message will not be receive by the peripheral sent on the bus
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during the reset, the message will be lost.
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config TWAI_ERRATA_FIX_RX_FIFO_CORRUPT
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bool "Add SW workaround for RX FIFO corruption errata"
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depends on IDF_TARGET_ESP32
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default y
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help
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On the ESP32, when the RX FIFO overruns and the RX message counter maxes out at 64 messages, the entire
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RX FIFO is no longer recoverable. Enabling this option will add a workaround that resets the peripheral
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on detection of this errata condition. Note that if a frame is being sent on the bus during the reset
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bus during the reset, the message will be lost.
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config TWAI_ERRATA_FIX_LISTEN_ONLY_DOM
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bool "Add SW workaround for listen only transmits dominant bit errata"
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depends on IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C3
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default y
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help
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When in the listen only mode, the TWAI controller must not influence the TWAI bus (i.e., must not send
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any dominant bits). However, while in listen only mode on the ESP32/ESP32-S2/ESP32-S3/ESP32-C3, the
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TWAI controller will still transmit dominant bits when it detects an error (i.e., as part of an active
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error frame). Enabling this option will add a workaround that forces the TWAI controller into an error
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passive state on initialization, thus preventing any dominant bits from being sent.
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endmenu # TWAI Configuration
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