wuzhenghui 05e74480f5 feat(esp_system): gate some clock by default to optmize esp32p4 active power

2024-09-11 10:53:00 +08:00

..

include/hal

feat(esp_system): gate some clock by default to optmize esp32p4 active power

2024-09-11 10:53:00 +08:00

clk_tree_hal.c

remove(clk): rc32k is removed as a clk source option for lp_slow_clk on C5/C61

2024-07-31 22:41:23 +08:00

efuse_hal.c

feat: enabled ecdsa support for c5

2024-05-28 17:33:05 +05:30

modem_clock_hal.c

fix(ci): some actions taken to pass ci

2024-08-29 14:15:41 +08:00

pau_hal.c

change(hal): add hal interface to configure pau regdma wait timeout parameter

2024-08-28 10:44:09 +08:00

pmu_hal.c

change(esp_hw_support): pmu reset and isolate contorl signal waiting time configuration

2024-08-28 10:44:08 +08:00