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esp-idf/components/xtensa
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Omar Chebib 8fae0f0753 G0: Support Xtensa targets for G0-only compilation 
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
..
esp32
xtensa: move out trax
2021-02-26 19:45:48 +08:00
esp32s2
xtensa: move out trax
2021-02-26 19:45:48 +08:00
esp32s3
hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
2022-06-14 14:40:03 +08:00
include
freertos: Xtensa FreeRTOS saves threadptr in solicited stack frame
2022-06-15 20:20:41 +08:00
trax
xtensa: Pass the test with latest gdb
2021-11-22 18:17:36 +01:00
CMakeLists.txt
build-system: add property for architecture (riscv/xtensa)
2022-05-20 09:00:32 +08:00
eri.c
Whitespace: Automated whitespace fixes (large commit)
2020-11-11 07:36:35 +00:00
linker.lf
[system]: put xtensa_intr_asm into IRAM
2021-04-26 12:11:20 +08:00
project_include.cmake
esp32: move toolchain check
2021-03-31 19:17:33 +08:00
xt_trax.c
xtensa: move out trax
2021-02-26 19:45:48 +08:00
xtensa_intr_asm.S
G0: Support Xtensa targets for G0-only compilation
2022-06-20 11:34:20 +00:00
xtensa_intr.c
G0: Support Xtensa targets for G0-only compilation
2022-06-20 11:34:20 +00:00