Angus Gratton 997c07c2ee esp32s2 riscv ulp: Ensure reset vector is always at offset 0x0 ...

Previous linker script relied on nothing else using the .text section

As reported at https://esp32.com/viewtopic.php?f=2&t=20734&p=75997

2021-05-07 10:54:55 +10:00

..

include/ulp_riscv

Whitespace: Automated whitespace fixes (large commit)

2020-11-11 07:36:35 +00:00

start.S

esp32s2 riscv ulp: Ensure reset vector is always at offset 0x0

2021-05-07 10:54:55 +10:00

ulp_riscv_utils.c

Whitespace: Automated whitespace fixes (large commit)

2020-11-11 07:36:35 +00:00