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			59 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			59 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| menu "Memory"
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| 
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|     config ESP32_RTCDATA_IN_FAST_MEM
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|         bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
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|         default n
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|         depends on ESP_SYSTEM_SINGLE_CORE_MODE
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|         help
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|             This option allows to place .rtc_data and .rtc_rodata sections into
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|             RTC fast memory segment to free the slow memory region for ULP programs.
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|             This option depends on the CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE option because RTC fast memory
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|             can be accessed only by PRO_CPU core.
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| 
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|     config ESP32_USE_FIXED_STATIC_RAM_SIZE
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|         bool "Use fixed static RAM size"
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|         default n
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|         help
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|             If this option is disabled, the DRAM part of the heap starts right after the .bss section,
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|             within the dram0_0 region. As a result, adding or removing some static variables
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|             will change the available heap size.
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| 
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|             If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
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|             where its length is set with ESP32_FIXED_STATIC_RAM_SIZE
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| 
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|     config ESP32_FIXED_STATIC_RAM_SIZE
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|         hex "Fixed Static RAM size"
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|         default 0x1E000
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|         range 0 0x2c200
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|         depends on ESP32_USE_FIXED_STATIC_RAM_SIZE
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|         help
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|             RAM size dedicated for static variables (.data & .bss sections).
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|             Please note that the actual length will be reduced by BTDM_RESERVE_DRAM if Bluetooth
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|             controller is enabled.
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| 
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|     config ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
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|         bool "Enable IRAM as 8 bit accessible memory"
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|         depends on ESP_SYSTEM_SINGLE_CORE_MODE
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|         help
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|             If enabled, application can use IRAM as byte accessible region for storing data
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|             (Note: IRAM region cannot be used as task stack)
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| 
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|             This is possible due to handling of exceptions `LoadStoreError (3)` and `LoadStoreAlignmentError (9)`
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|             Each unaligned read/write access will incur a penalty of maximum of 167 CPU cycles.
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| 
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|     menu "Non-backward compatible options"
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| 
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|         config ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM
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|             bool "Reserve parts of SRAM1 for app IRAM (WARNING, read help before enabling)"
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|             depends on !ESP32_TRAX
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|             help
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|                 Reserve parts of SRAM1 for app IRAM which was previously reserved for bootloader DRAM.
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|                 If booting an app on an older bootloader from before this option was introduced, the app will fail
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|                 to boot due to not recognizing the new IRAM memory area.
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| 
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|                 If this is the case please test carefully before pushing out any OTA updates.
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| 
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|     endmenu
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| 
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| endmenu # Memory
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