Angus Gratton 1fc288556c esp_system: Reconfigure the WDTs at the start of the panic handler ...

This is mostly important on ESP32 ECO3 with the
ESP32_ECO3_CACHE_LOCK_FIX, because when we stall the other CPU core
before we disable the TG1 WDT then the first CPU can get stuck
in WDT ISR handle_livelock_int routine waiting for the other CPU.

2021-07-06 09:59:39 +08:00

..

arch

esp32c3: memprot API upgrade and test application

2021-04-12 10:21:58 +10:00

include

async_mcp: apply gdma driver

2021-01-13 10:52:27 +08:00

soc

uart: fix misleading files for UART2

2021-04-29 14:23:13 +08:00

async_memcpy_impl_gdma.c

async_mcp: apply gdma driver

2021-01-13 10:52:27 +08:00

CMakeLists.txt

esp_system: support riscv panic

2020-11-13 07:49:11 +11:00

cpu_start.c

esp32c3: fix typos of c3 path

2021-04-23 21:09:06 +08:00

panic_handler.c

esp_system: Reconfigure the WDTs at the start of the panic handler

2021-07-06 09:59:39 +08:00