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https://github.com/espressif/esp-idf.git
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715 lines
24 KiB
C
715 lines
24 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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//#include "esp_attr.h"
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#include "esp_panic.h"
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#include "esp_partition.h"
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#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH || CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
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#include "esp_log.h"
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const static char *TAG = "esp_core_dump";
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// TODO: allow user to set this in menuconfig or get tasks iteratively
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#define COREDUMP_MAX_TASKS_NUM 32
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typedef esp_err_t (*esp_core_dump_write_prepare_t)(void *priv, uint32_t *data_len);
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typedef esp_err_t (*esp_core_dump_write_start_t)(void *priv);
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typedef esp_err_t (*esp_core_dump_write_end_t)(void *priv);
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typedef esp_err_t (*esp_core_dump_flash_write_data_t)(void *priv, void * data, uint32_t data_len);
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typedef struct _core_dump_write_config_t
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{
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esp_core_dump_write_prepare_t prepare;
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esp_core_dump_write_start_t start;
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esp_core_dump_write_end_t end;
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esp_core_dump_flash_write_data_t write;
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void * priv;
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} core_dump_write_config_t;
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static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *write_cfg, int verb)
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{
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union
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{
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uint8_t data8[12];
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uint32_t data32[3];
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} rom_data;
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//const esp_partition_t *core_part;
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esp_err_t err;
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TaskSnapshot_t tasks[COREDUMP_MAX_TASKS_NUM];
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UBaseType_t tcb_sz, task_num;
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uint32_t data_len = 0, i, len;
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//size_t off;
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task_num = uxTaskGetSnapshotAll(tasks, COREDUMP_MAX_TASKS_NUM, &tcb_sz);
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// take TCB padding into account, actual TCB size will be stored in header
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if (tcb_sz % sizeof(uint32_t))
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len = (tcb_sz / sizeof(uint32_t) + 1) * sizeof(uint32_t);
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else
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len = tcb_sz;
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// header + tasknum*(tcb + stack start/end + tcb addr)
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data_len = 3*sizeof(uint32_t) + task_num*(len + 2*sizeof(uint32_t) + sizeof(uint32_t *));
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for (i = 0; i < task_num; i++) {
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if (tasks[i].pxTCB == xTaskGetCurrentTaskHandle()) {
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// set correct stack top for current task
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tasks[i].pxTopOfStack = (StackType_t *)frame;
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if (verb) {
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esp_panicPutStr("Current task PC/A0/SP ");
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esp_panicPutHex(frame->pc);
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esp_panicPutStr(" ");
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esp_panicPutHex(frame->a0);
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esp_panicPutStr(" ");
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esp_panicPutHex(frame->a1);
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esp_panicPutStr("\r\n");
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}
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}
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#if( portSTACK_GROWTH < 0 )
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len = (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack;
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#else
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len = (uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack;
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#endif
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if (verb) {
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esp_panicPutStr("stack len = ");
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esp_panicPutHex(len);
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esp_panicPutStr(" ");
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esp_panicPutHex((int)tasks[i].pxTopOfStack);
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esp_panicPutStr(" ");
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esp_panicPutHex((int)tasks[i].pxEndOfStack);
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esp_panicPutStr("\r\n");
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}
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// take stack padding into account
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if (len % sizeof(uint32_t))
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len = (len / sizeof(uint32_t) + 1) * sizeof(uint32_t);
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data_len += len;
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}
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// prepare write
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if (write_cfg->prepare) {
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err = write_cfg->prepare(write_cfg->priv, &data_len);
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to prepare core dump ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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}
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if (verb) {
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esp_panicPutStr("Core dump len =");
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esp_panicPutHex(data_len);
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esp_panicPutStr("\r\n");
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}
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// write start marker
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if (write_cfg->start) {
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err = write_cfg->start(write_cfg->priv);
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to start core dump ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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}
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// write header
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rom_data.data32[0] = data_len;
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rom_data.data32[1] = task_num;
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rom_data.data32[2] = tcb_sz;
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err = write_cfg->write(write_cfg->priv, &rom_data, 3*sizeof(uint32_t));
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to write core dump header ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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// write tasks
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for (i = 0; i < task_num; i++) {
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if (verb) {
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esp_panicPutStr("Dump task ");
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esp_panicPutHex((int)tasks[i].pxTCB);
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esp_panicPutStr("\r\n");
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}
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// save TCB address, stack base and stack top addr
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rom_data.data32[0] = (uint32_t)tasks[i].pxTCB;
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rom_data.data32[1] = (uint32_t)tasks[i].pxTopOfStack;
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rom_data.data32[2] = (uint32_t)tasks[i].pxEndOfStack;
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err = write_cfg->write(write_cfg->priv, &rom_data, 3*sizeof(uint32_t));
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to write task header ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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// save TCB
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err = write_cfg->write(write_cfg->priv, tasks[i].pxTCB, tcb_sz);
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to write task header ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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// save task stack
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/*int k;
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for (k = 0; k < 8*4; k++) {
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esp_panicPutStr("stack[");
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esp_panicPutDec(k);
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esp_panicPutStr("] = ");
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esp_panicPutHex(((uint8_t *)tasks[i].pxTopOfStack)[k]);
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esp_panicPutStr("\r\n");
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}*/
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err = write_cfg->write(write_cfg->priv,
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#if( portSTACK_GROWTH < 0 )
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tasks[i].pxTopOfStack,
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(uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack
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#else
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tasks[i].pxEndOfStack,
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(uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack
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#endif
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);
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to write task header ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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}
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// write end marker
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if (write_cfg->end) {
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err = write_cfg->end(write_cfg->priv);
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to end core dump ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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}
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}
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#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
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// magic numbers to control core dump data consistency
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#define COREDUMP_FLASH_MAGIC_START 0xDEADBEEFUL
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#define COREDUMP_FLASH_MAGIC_END 0xACDCFEEDUL
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typedef struct _core_dump_write_flash_data_t
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{
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uint32_t off;
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} core_dump_write_flash_data_t;
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// core dump partition start
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static uint32_t s_core_part_start;
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// core dump partition size
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static uint32_t s_core_part_size;
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static uint32_t esp_core_dump_write_flash_padded(size_t off, uint8_t *data, uint32_t data_size)
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{
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esp_err_t err;
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uint32_t data_len = 0, k, len;
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union
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{
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uint8_t data8[4];
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uint32_t data32;
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} rom_data;
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data_len = (data_size / sizeof(uint32_t)) * sizeof(uint32_t);
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err = spi_flash_write_panic(off, data, data_len);
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to write data");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return 0;
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}
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len = data_size % sizeof(uint32_t);
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if (len) {
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// write last bytes with padding, actual TCB len can be retrieved by esptool from core dump header
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rom_data.data32 = 0;
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for (k = 0; k < len; k++)
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rom_data.data8[k] = *(data + data_len + k);
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err = spi_flash_write_panic(off + data_len, &rom_data, sizeof(uint32_t));
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to write data end");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return 0;
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}
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data_len += sizeof(uint32_t);
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}
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return data_len;
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}
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static esp_err_t esp_core_dump_flash_write_prepare(void *priv, uint32_t *data_len)
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{
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esp_err_t err;
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uint32_t sec_num;
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core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
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esp_panicPutStr("Core dump len1 = ");
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esp_panicPutHex(*data_len);
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esp_panicPutStr("\r\n");
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// add space for 2 magics. TODO: change to CRC
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*data_len += 2*sizeof(uint32_t);
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if (*data_len > s_core_part_size) {
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esp_panicPutStr("ERROR: Not enough space to save core dump!");
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return ESP_ERR_NO_MEM;
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}
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esp_panicPutStr("Core dump len2 = ");
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esp_panicPutHex(*data_len);
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esp_panicPutStr("\r\n");
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wr_data->off = 0;
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sec_num = *data_len / SPI_FLASH_SEC_SIZE;
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if (*data_len % SPI_FLASH_SEC_SIZE)
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sec_num++;
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err = spi_flash_erase_range_panic(s_core_part_start + 0, sec_num * SPI_FLASH_SEC_SIZE);
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to erase flash ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return err;
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}
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return err;
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}
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static esp_err_t esp_core_dump_flash_write_word(core_dump_write_flash_data_t *wr_data, uint32_t word)
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{
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esp_err_t err = ESP_OK;
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uint32_t data32 = word;
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err = spi_flash_write_panic(s_core_part_start + wr_data->off, &data32, sizeof(uint32_t));
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if (err != ESP_OK) {
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esp_panicPutStr("Failed to write to flash ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return err;
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}
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wr_data->off += sizeof(uint32_t);
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return err;
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}
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static esp_err_t esp_core_dump_flash_write_start(void *priv)
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{
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core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
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// save magic 1
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return esp_core_dump_flash_write_word(wr_data, COREDUMP_FLASH_MAGIC_START);
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}
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static esp_err_t esp_core_dump_flash_write_end(void *priv)
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{
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core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
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uint32_t i;
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union
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{
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uint8_t data8[16];
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uint32_t data32[4];
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} rom_data;
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// TEST READ START
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esp_err_t err = spi_flash_read_panic(s_core_part_start + 0, &rom_data, sizeof(rom_data));
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to read flash ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return err;
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}
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else {
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esp_panicPutStr("Data from flash:\r\n");
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for (i = 0; i < sizeof(rom_data)/sizeof(rom_data.data32[0]); i++) {
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esp_panicPutHex(rom_data.data32[i]);
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esp_panicPutStr("\r\n");
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}
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// rom_data[4] = 0;
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// esp_panicPutStr(rom_data);
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// esp_panicPutStr("\r\n");
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}
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// TEST READ END
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// save magic 2
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return esp_core_dump_flash_write_word(wr_data, COREDUMP_FLASH_MAGIC_END);
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}
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static esp_err_t esp_core_dump_flash_write_data(void *priv, void * data, uint32_t data_len)
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{
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esp_err_t err = ESP_OK;
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core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
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uint32_t len = esp_core_dump_write_flash_padded(s_core_part_start + wr_data->off, data, data_len);
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if (len != data_len)
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return ESP_FAIL;
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wr_data->off += len;
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return err;
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}
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/*
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* | MAGIC1 |
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* | TOTAL_LEN | TASKS_NUM | TCB_SIZE |
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* | TCB_ADDR_1 | STACK_TOP_1 | STACK_END_1 | TCB_1 | STACK_1 |
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* . . . .
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* . . . .
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* | TCB_ADDR_N | STACK_TOP_N | STACK_END_N | TCB_N | STACK_N |
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* | MAGIC2 |
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*/
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void esp_core_dump_to_flash(XtExcFrame *frame)
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{
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#if 1
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core_dump_write_config_t wr_cfg;
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core_dump_write_flash_data_t wr_data;
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wr_cfg.prepare = esp_core_dump_flash_write_prepare;
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wr_cfg.start = esp_core_dump_flash_write_start;
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wr_cfg.end = esp_core_dump_flash_write_end;
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wr_cfg.write = esp_core_dump_flash_write_data;
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wr_cfg.priv = &wr_data;
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esp_panicPutStr("Save core dump to flash...\r\n");
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esp_core_dump_write(frame, &wr_cfg, 1);
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#else
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union
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{
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uint8_t data8[16];
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uint32_t data32[4];
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} rom_data;
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//const esp_partition_t *core_part;
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esp_err_t err;
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TaskSnapshot_t tasks[COREDUMP_MAX_TASKS_NUM];
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UBaseType_t tcb_sz, task_num;
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uint32_t data_len = 0, i, len, sec_num;
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size_t off;
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esp_panicPutStr("Save core dump to flash...\r\n");
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task_num = uxTaskGetSnapshotAll(tasks, COREDUMP_MAX_TASKS_NUM, &tcb_sz);
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// take TCB padding into account, actual TCB size will be stored in header
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if (tcb_sz % sizeof(uint32_t))
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len = (tcb_sz / sizeof(uint32_t) + 1) * sizeof(uint32_t);
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else
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len = tcb_sz;
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// header + magic2 + tasknum*(tcb + stack start/end + tcb addr)
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data_len = 5*sizeof(uint32_t) + task_num*(len + 2*sizeof(uint32_t) + sizeof(uint32_t *));
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for (i = 0; i < task_num; i++) {
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if (tasks[i].pxTCB == xTaskGetCurrentTaskHandle()) {
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// set correct stack top for current task
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tasks[i].pxTopOfStack = (StackType_t *)frame;
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esp_panicPutStr("Current task PC/A0/SP ");
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esp_panicPutHex(frame->pc);
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esp_panicPutStr(" ");
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esp_panicPutHex(frame->a0);
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esp_panicPutStr(" ");
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esp_panicPutHex(frame->a1);
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esp_panicPutStr("\r\n");
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}
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#if( portSTACK_GROWTH < 0 )
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len = (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack;
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#else
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len = (uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack;
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#endif
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esp_panicPutStr("stack len = ");
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esp_panicPutHex(len);
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esp_panicPutStr(" ");
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esp_panicPutHex((int)tasks[i].pxTopOfStack);
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esp_panicPutStr(" ");
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esp_panicPutHex((int)tasks[i].pxEndOfStack);
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esp_panicPutStr("\r\n");
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// take stack padding into account
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if (len % sizeof(uint32_t))
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len = (len / sizeof(uint32_t) + 1) * sizeof(uint32_t);
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data_len += len;
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}
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esp_panicPutStr("Core dump len =");
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esp_panicPutHex(data_len);
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esp_panicPutStr("\r\n");
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if (data_len > s_core_part_size) {
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esp_panicPutStr("ERROR: Not enough space to save core dump!");
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return;
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}
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// TEST READ START
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err = spi_flash_read_panic(s_core_part_start + 0, &rom_data, sizeof(rom_data));
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if (err != ESP_OK) {
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esp_panicPutStr("ERROR: Failed to read flash ");
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esp_panicPutHex(err);
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esp_panicPutStr("!\r\n");
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return;
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}
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else {
|
|
esp_panicPutStr("Data from flash:\r\n");
|
|
for (i = 0; i < sizeof(rom_data)/sizeof(rom_data.data32[0]); i++) {
|
|
esp_panicPutHex(rom_data.data32[i]);
|
|
esp_panicPutStr("\r\n");
|
|
}
|
|
// rom_data[4] = 0;
|
|
// esp_panicPutStr(rom_data);
|
|
// esp_panicPutStr("\r\n");
|
|
}
|
|
// TEST READ END
|
|
|
|
sec_num = data_len / SPI_FLASH_SEC_SIZE;
|
|
if (data_len % SPI_FLASH_SEC_SIZE)
|
|
sec_num++;
|
|
err = spi_flash_erase_range_panic(s_core_part_start + 0, sec_num * SPI_FLASH_SEC_SIZE);
|
|
if (err != ESP_OK) {
|
|
esp_panicPutStr("ERROR: Failed to erase flash ");
|
|
esp_panicPutHex(err);
|
|
esp_panicPutStr("!\r\n");
|
|
return;
|
|
}
|
|
|
|
rom_data.data32[0] = COREDUMP_FLASH_MAGIC_START;
|
|
rom_data.data32[1] = data_len;
|
|
rom_data.data32[2] = task_num;
|
|
rom_data.data32[3] = tcb_sz;
|
|
err = spi_flash_write_panic(s_core_part_start + 0, &rom_data, sizeof(rom_data));
|
|
if (err != ESP_OK) {
|
|
esp_panicPutStr("ERROR: Failed to write core dump header ");
|
|
esp_panicPutHex(err);
|
|
esp_panicPutStr("!\r\n");
|
|
return;
|
|
}
|
|
off = sizeof(rom_data);
|
|
|
|
for (i = 0; i < task_num; i++) {
|
|
esp_panicPutStr("Dump task ");
|
|
esp_panicPutHex((int)tasks[i].pxTCB);
|
|
esp_panicPutStr("\r\n");
|
|
|
|
// save TCB address, stack base and stack top addr
|
|
rom_data.data32[0] = (uint32_t)tasks[i].pxTCB;
|
|
rom_data.data32[1] = (uint32_t)tasks[i].pxTopOfStack;
|
|
rom_data.data32[2] = (uint32_t)tasks[i].pxEndOfStack;
|
|
err = spi_flash_write_panic(s_core_part_start + off, &rom_data, 3*sizeof(uint32_t));
|
|
if (err != ESP_OK) {
|
|
esp_panicPutStr("ERROR: Failed to write task header ");
|
|
esp_panicPutHex(err);
|
|
esp_panicPutStr("!\r\n");
|
|
return;
|
|
}
|
|
off += 3*sizeof(uint32_t);
|
|
// save TCB
|
|
len = esp_core_dump_write_flash_padded(s_core_part_start + off, tasks[i].pxTCB, tcb_sz);
|
|
if (len == 0)
|
|
return;
|
|
off += len;
|
|
// save task stack
|
|
/*int k;
|
|
for (k = 0; k < 8*4; k++) {
|
|
esp_panicPutStr("stack[");
|
|
esp_panicPutDec(k);
|
|
esp_panicPutStr("] = ");
|
|
esp_panicPutHex(((uint8_t *)tasks[i].pxTopOfStack)[k]);
|
|
esp_panicPutStr("\r\n");
|
|
}*/
|
|
len = esp_core_dump_write_flash_padded(s_core_part_start + off,
|
|
#if( portSTACK_GROWTH < 0 )
|
|
tasks[i].pxTopOfStack,
|
|
(uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack
|
|
#else
|
|
tasks[i].pxEndOfStack,
|
|
(uint32_t)tasks[i].pxTopOfStack - (uint32_t)tasks[i].pxEndOfStack
|
|
#endif
|
|
);
|
|
if (len == 0)
|
|
return;
|
|
off += len;
|
|
}
|
|
|
|
rom_data.data32[0] = COREDUMP_FLASH_MAGIC_END;
|
|
err = spi_flash_write_panic(s_core_part_start + off, &rom_data, sizeof(uint32_t));
|
|
if (err != ESP_OK) {
|
|
esp_panicPutStr("Failed to write to flash ");
|
|
esp_panicPutHex(err);
|
|
esp_panicPutStr("!\r\n");
|
|
return;
|
|
}
|
|
#endif
|
|
esp_panicPutStr("Core dump has been saved to flash.\r\n");
|
|
}
|
|
#endif
|
|
|
|
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
|
|
#if 0
|
|
#define BASE64_ENCODE_BODY(_src, _src_len, _dst) \
|
|
do { \
|
|
static const char *b64 = \
|
|
"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/"; \
|
|
int i, j, a, b, c; \
|
|
\
|
|
for (i = j = 0; i < _src_len; i += 3) { \
|
|
a = _src[i]; \
|
|
b = i + 1 >= _src_len ? 0 : _src[i + 1]; \
|
|
c = i + 2 >= _src_len ? 0 : _src[i + 2]; \
|
|
\
|
|
/*BASE64_OUT(b64[a >> 2], _dst[j]);*/ \
|
|
_dst[j++] = b64[a >> 2]; \
|
|
/*BASE64_OUT(b64[((a & 3) << 4) | (b >> 4)], _dst[j]);*/ \
|
|
_dst[j++] = b64[((a & 3) << 4) | (b >> 4)]; \
|
|
j++; \
|
|
if (i + 1 < _src_len) { \
|
|
BASE64_OUT(b64[(b & 15) << 2 | (c >> 6)], _dst[j]); \
|
|
j++; \
|
|
} \
|
|
if (i + 2 < _src_len) { \
|
|
BASE64_OUT(b64[c & 63], _dst[j]); \
|
|
j++; \
|
|
} \
|
|
} \
|
|
\
|
|
while (j % 4 != 0) { \
|
|
BASE64_OUT('=', _dst); \
|
|
} \
|
|
BASE64_FLUSH(_dst) \
|
|
} while(0)
|
|
|
|
#define BASE64_OUT(ch, _dst) \
|
|
do { \
|
|
_dst = (ch); \
|
|
} while (0)
|
|
|
|
#define BASE64_FLUSH(_dst) \
|
|
do { \
|
|
_dst = '\0'; \
|
|
} while (0)
|
|
#endif
|
|
static void esp_core_dump_b64_encode(const uint8_t *src, uint32_t src_len, uint8_t *dst) {
|
|
// BASE64_ENCODE_BODY(src, src_len, dst);
|
|
static const char *b64 =
|
|
"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
|
|
int i, j, a, b, c;
|
|
|
|
for (i = j = 0; i < src_len; i += 3) {
|
|
a = src[i];
|
|
b = i + 1 >= src_len ? 0 : src[i + 1];
|
|
c = i + 2 >= src_len ? 0 : src[i + 2];
|
|
|
|
dst[j++] = b64[a >> 2];
|
|
dst[j++] = b64[((a & 3) << 4) | (b >> 4)];
|
|
if (i + 1 < src_len) {
|
|
dst[j++] = b64[(b & 0x0F) << 2 | (c >> 6)];
|
|
}
|
|
if (i + 2 < src_len) {
|
|
dst[j++] = b64[c & 0x3F];
|
|
}
|
|
}
|
|
while (j % 4 != 0) {
|
|
dst[j++] = '=';
|
|
}
|
|
dst[j++] = '\0';
|
|
}
|
|
|
|
/*static esp_err_t esp_core_dump_uart_write_prepare(void *priv, uint32_t *data_len)
|
|
{
|
|
esp_err_t err = ESP_OK;
|
|
return err;
|
|
}*/
|
|
|
|
static esp_err_t esp_core_dump_uart_write_start(void *priv)
|
|
{
|
|
// core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
|
|
esp_err_t err = ESP_OK;
|
|
esp_panicPutStr("================= CORE DUMP START =================\r\n");
|
|
return err;
|
|
}
|
|
|
|
static esp_err_t esp_core_dump_uart_write_end(void *priv)
|
|
{
|
|
// core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
|
|
esp_err_t err = ESP_OK;
|
|
esp_panicPutStr("================= CORE DUMP END =================\r\n");
|
|
return err;
|
|
}
|
|
|
|
static esp_err_t esp_core_dump_uart_write_data(void *priv, void * data, uint32_t data_len)
|
|
{
|
|
// core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
|
|
esp_err_t err = ESP_OK;
|
|
char buf[64 + 4], *addr = data;
|
|
char *end = addr + data_len;
|
|
|
|
// esp_panicPutStr("CORE DUMP SEC: ");
|
|
// esp_panicPutDec(data_len);
|
|
// esp_panicPutStr("bytes\r\n");
|
|
|
|
while (addr < end) {
|
|
size_t len = end - addr;
|
|
if (len > 48) len = 48;
|
|
/* Copy to stack to avoid alignment restrictions. */
|
|
char *tmp = buf + (sizeof(buf) - len);
|
|
memcpy(tmp, addr, len);
|
|
esp_core_dump_b64_encode((const uint8_t *)tmp, len, (uint8_t *)buf);
|
|
addr += len;
|
|
esp_panicPutStr(buf);
|
|
// for (size_t i = 0; buf[i] != '\0'; i++) {
|
|
// panicPutChar(buf[i]);
|
|
// }
|
|
//if (addr % 96 == 0)
|
|
esp_panicPutStr("\r\n");
|
|
/* Feed the Cerberus. */
|
|
// TIMERG0.wdt_wprotect = TIMG_WDT_WKEY_VALUE;
|
|
// TIMERG0.wdt_feed = 1;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
void esp_core_dump_to_uart(XtExcFrame *frame)
|
|
{
|
|
core_dump_write_config_t wr_cfg;
|
|
//core_dump_write_flash_data_t wr_data;
|
|
|
|
wr_cfg.prepare = NULL;//esp_core_dump_uart_write_prepare;
|
|
wr_cfg.start = esp_core_dump_uart_write_start;
|
|
wr_cfg.end = esp_core_dump_uart_write_end;
|
|
wr_cfg.write = esp_core_dump_uart_write_data;
|
|
wr_cfg.priv = NULL;
|
|
|
|
esp_panicPutStr("Save core dump to flash...\r\n");
|
|
esp_core_dump_write(frame, &wr_cfg, 0);
|
|
esp_panicPutStr("Core dump has been written to uart.\r\n");
|
|
}
|
|
#endif
|
|
|
|
void esp_core_dump_init()
|
|
{
|
|
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
|
|
const esp_partition_t *core_part;
|
|
|
|
ESP_LOGI(TAG, "Init core dump to flash");
|
|
core_part = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_COREDUMP, NULL);
|
|
if (!core_part) {
|
|
ESP_LOGE(TAG, "No core dump partition found!");
|
|
return;
|
|
}
|
|
ESP_LOGI(TAG, "Found partition '%s' @ %x %d bytes", core_part->label, core_part->address, core_part->size);
|
|
s_core_part_start = core_part->address;
|
|
s_core_part_size = core_part->size;
|
|
#endif
|
|
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
|
|
ESP_LOGI(TAG, "Init core dump to UART");
|
|
#endif
|
|
}
|
|
|
|
#endif
|
|
|