mirror of
https://github.com/espressif/esp-idf.git
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391 lines
19 KiB
C
391 lines
19 KiB
C
/*
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* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#define GPIO_EVT_CH0_RISE_EDGE 1
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#define GPIO_EVT_CH1_RISE_EDGE 2
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#define GPIO_EVT_CH2_RISE_EDGE 3
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#define GPIO_EVT_CH3_RISE_EDGE 4
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#define GPIO_EVT_CH4_RISE_EDGE 5
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#define GPIO_EVT_CH5_RISE_EDGE 6
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#define GPIO_EVT_CH6_RISE_EDGE 7
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#define GPIO_EVT_CH7_RISE_EDGE 8
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#define GPIO_EVT_CH0_FALL_EDGE 9
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#define GPIO_EVT_CH1_FALL_EDGE 10
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#define GPIO_EVT_CH2_FALL_EDGE 11
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#define GPIO_EVT_CH3_FALL_EDGE 12
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#define GPIO_EVT_CH4_FALL_EDGE 13
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#define GPIO_EVT_CH5_FALL_EDGE 14
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#define GPIO_EVT_CH6_FALL_EDGE 15
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#define GPIO_EVT_CH7_FALL_EDGE 16
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#define GPIO_EVT_CH0_ANY_EDGE 17
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#define GPIO_EVT_CH1_ANY_EDGE 18
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#define GPIO_EVT_CH2_ANY_EDGE 19
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#define GPIO_EVT_CH3_ANY_EDGE 20
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#define GPIO_EVT_CH4_ANY_EDGE 21
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#define GPIO_EVT_CH5_ANY_EDGE 22
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#define GPIO_EVT_CH6_ANY_EDGE 23
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#define GPIO_EVT_CH7_ANY_EDGE 24
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#define LEDC_EVT_DUTY_CHNG_END_CH0 27
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#define LEDC_EVT_DUTY_CHNG_END_CH1 28
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#define LEDC_EVT_DUTY_CHNG_END_CH2 29
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#define LEDC_EVT_DUTY_CHNG_END_CH3 30
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#define LEDC_EVT_DUTY_CHNG_END_CH4 31
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#define LEDC_EVT_DUTY_CHNG_END_CH5 32
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#define LEDC_EVT_DUTY_CHNG_END_CH6 33
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#define LEDC_EVT_DUTY_CHNG_END_CH7 34
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#define LEDC_EVT_OVF_CNT_PLS_CH0 35
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#define LEDC_EVT_OVF_CNT_PLS_CH1 36
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#define LEDC_EVT_OVF_CNT_PLS_CH2 37
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#define LEDC_EVT_OVF_CNT_PLS_CH3 38
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#define LEDC_EVT_OVF_CNT_PLS_CH4 39
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#define LEDC_EVT_OVF_CNT_PLS_CH5 40
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#define LEDC_EVT_OVF_CNT_PLS_CH6 41
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#define LEDC_EVT_OVF_CNT_PLS_CH7 42
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#define LEDC_EVT_TIME_OVF_TIMER0 43
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#define LEDC_EVT_TIME_OVF_TIMER1 44
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#define LEDC_EVT_TIME_OVF_TIMER2 45
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#define LEDC_EVT_TIME_OVF_TIMER3 46
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#define LEDC_EVT_TIMER0_CMP 47
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#define LEDC_EVT_TIMER1_CMP 48
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#define LEDC_EVT_TIMER2_CMP 49
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#define LEDC_EVT_TIMER3_CMP 50
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#define TG0_EVT_CNT_CMP_TIMER0 51
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#define TG1_EVT_CNT_CMP_TIMER0 52
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#define SYSTIMER_EVT_CNT_CMP0 53
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#define SYSTIMER_EVT_CNT_CMP1 54
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#define SYSTIMER_EVT_CNT_CMP2 55
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#define MCPWM0_EVT_TIMER0_STOP 56
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#define MCPWM0_EVT_TIMER1_STOP 57
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#define MCPWM0_EVT_TIMER2_STOP 58
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#define MCPWM0_EVT_TIMER0_TEZ 59
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#define MCPWM0_EVT_TIMER1_TEZ 60
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#define MCPWM0_EVT_TIMER2_TEZ 61
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#define MCPWM0_EVT_TIMER0_TEP 62
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#define MCPWM0_EVT_TIMER1_TEP 63
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#define MCPWM0_EVT_TIMER2_TEP 64
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#define MCPWM0_EVT_OP0_TEA 65
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#define MCPWM0_EVT_OP1_TEA 66
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#define MCPWM0_EVT_OP2_TEA 67
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#define MCPWM0_EVT_OP0_TEB 68
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#define MCPWM0_EVT_OP1_TEB 69
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#define MCPWM0_EVT_OP2_TEB 70
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#define MCPWM0_EVT_F0 71
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#define MCPWM0_EVT_F1 72
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#define MCPWM0_EVT_F2 73
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#define MCPWM0_EVT_F0_CLR 74
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#define MCPWM0_EVT_F1_CLR 75
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#define MCPWM0_EVT_F2_CLR 76
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#define MCPWM0_EVT_TZ0_CBC 77
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#define MCPWM0_EVT_TZ1_CBC 78
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#define MCPWM0_EVT_TZ2_CBC 79
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#define MCPWM0_EVT_TZ0_OST 80
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#define MCPWM0_EVT_TZ1_OST 81
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#define MCPWM0_EVT_TZ2_OST 82
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#define MCPWM0_EVT_CAP0 83
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#define MCPWM0_EVT_CAP1 84
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#define MCPWM0_EVT_CAP2 85
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#define MCPWM0_EVT_OP0_TEE1 86
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#define MCPWM0_EVT_OP1_TEE1 87
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#define MCPWM0_EVT_OP2_TEE1 88
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#define MCPWM0_EVT_OP0_TEE2 89
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#define MCPWM0_EVT_OP1_TEE2 90
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#define MCPWM0_EVT_OP2_TEE2 91
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#define MCPWM1_EVT_TIMER0_STOP 92
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#define MCPWM1_EVT_TIMER1_STOP 93
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#define MCPWM1_EVT_TIMER2_STOP 94
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#define MCPWM1_EVT_TIMER0_TEZ 95
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#define MCPWM1_EVT_TIMER1_TEZ 96
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#define MCPWM1_EVT_TIMER2_TEZ 97
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#define MCPWM1_EVT_TIMER0_TEP 98
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#define MCPWM1_EVT_TIMER1_TEP 99
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#define MCPWM1_EVT_TIMER2_TEP 100
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#define MCPWM1_EVT_OP0_TEA 101
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#define MCPWM1_EVT_OP1_TEA 102
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#define MCPWM1_EVT_OP2_TEA 103
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#define MCPWM1_EVT_OP0_TEB 104
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#define MCPWM1_EVT_OP1_TEB 105
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#define MCPWM1_EVT_OP2_TEB 106
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#define MCPWM1_EVT_F0 107
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#define MCPWM1_EVT_F1 108
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#define MCPWM1_EVT_F2 109
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#define MCPWM1_EVT_F0_CLR 110
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#define MCPWM1_EVT_F1_CLR 111
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#define MCPWM1_EVT_F2_CLR 112
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#define MCPWM1_EVT_TZ0_CBC 113
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#define MCPWM1_EVT_TZ1_CBC 114
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#define MCPWM1_EVT_TZ2_CBC 115
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#define MCPWM1_EVT_TZ0_OST 116
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#define MCPWM1_EVT_TZ1_OST 117
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#define MCPWM1_EVT_TZ2_OST 118
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#define MCPWM1_EVT_CAP0 119
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#define MCPWM1_EVT_CAP1 120
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#define MCPWM1_EVT_CAP2 121
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#define MCPWM1_EVT_OP0_TEE1 122
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#define MCPWM1_EVT_OP1_TEE1 123
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#define MCPWM1_EVT_OP2_TEE1 124
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#define MCPWM1_EVT_OP0_TEE2 125
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#define MCPWM1_EVT_OP1_TEE2 126
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#define MCPWM1_EVT_OP2_TEE2 127
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#define ADC_EVT_CONV_CMPLT0 128
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#define ADC_EVT_EQ_ABOVE_THRESH0 129
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#define ADC_EVT_EQ_ABOVE_THRESH1 130
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#define ADC_EVT_EQ_BELOW_THRESH0 131
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#define ADC_EVT_EQ_BELOW_THRESH1 132
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#define ADC_EVT_RESULT_DONE0 133
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#define ADC_EVT_STOPPED0 134
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#define ADC_EVT_STARTED0 135
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#define REGDMA_EVT_DONE0 136
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#define REGDMA_EVT_DONE1 137
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#define REGDMA_EVT_DONE2 138
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#define REGDMA_EVT_DONE3 139
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#define REGDMA_EVT_ERR0 140
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#define REGDMA_EVT_ERR1 141
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#define REGDMA_EVT_ERR2 142
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#define REGDMA_EVT_ERR3 143
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#define TMPSNSR_EVT_OVER_LIMIT 144
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#define I2S0_EVT_RX_DONE 145
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#define I2S0_EVT_TX_DONE 146
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#define I2S0_EVT_X_WORDS_RECEIVED 147
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#define I2S0_EVT_X_WORDS_SENT 148
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#define RTC_EVT_TICK 152
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#define RTC_EVT_OVF 153
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#define RTC_EVT_CMP 154
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#define GDMA_EVT_IN_DONE_CH0 155
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#define GDMA_EVT_IN_DONE_CH1 156
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#define GDMA_EVT_IN_DONE_CH2 157
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#define GDMA_EVT_IN_DONE_CH3 158
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#define GDMA_EVT_IN_DONE_CH4 159
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#define GDMA_EVT_IN_SUC_EOF_CH0 160
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#define GDMA_EVT_IN_SUC_EOF_CH1 161
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#define GDMA_EVT_IN_SUC_EOF_CH2 162
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#define GDMA_EVT_IN_SUC_EOF_CH3 163
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#define GDMA_EVT_IN_SUC_EOF_CH4 164
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#define GDMA_EVT_IN_FIFO_EMPTY_CH0 165
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#define GDMA_EVT_IN_FIFO_EMPTY_CH1 166
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#define GDMA_EVT_IN_FIFO_EMPTY_CH2 167
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#define GDMA_EVT_IN_FIFO_EMPTY_CH3 168
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#define GDMA_EVT_IN_FIFO_EMPTY_CH4 169
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#define GDMA_EVT_IN_FIFO_FULL_CH0 170
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#define GDMA_EVT_IN_FIFO_FULL_CH1 171
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#define GDMA_EVT_IN_FIFO_FULL_CH2 172
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#define GDMA_EVT_IN_FIFO_FULL_CH3 173
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#define GDMA_EVT_IN_FIFO_FULL_CH4 174
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#define GDMA_EVT_OUT_DONE_CH0 175
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#define GDMA_EVT_OUT_DONE_CH1 176
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#define GDMA_EVT_OUT_DONE_CH2 177
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#define GDMA_EVT_OUT_DONE_CH3 178
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#define GDMA_EVT_OUT_DONE_CH4 179
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#define GDMA_EVT_OUT_EOF_CH0 180
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#define GDMA_EVT_OUT_EOF_CH1 181
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#define GDMA_EVT_OUT_EOF_CH2 182
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#define GDMA_EVT_OUT_EOF_CH3 183
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#define GDMA_EVT_OUT_EOF_CH4 184
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#define GDMA_EVT_OUT_TOTAL_EOF_CH0 185
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#define GDMA_EVT_OUT_TOTAL_EOF_CH1 186
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#define GDMA_EVT_OUT_TOTAL_EOF_CH2 187
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#define GDMA_EVT_OUT_TOTAL_EOF_CH3 188
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#define GDMA_EVT_OUT_TOTAL_EOF_CH4 189
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#define GDMA_EVT_OUT_FIFO_EMPTY_CH0 190
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#define GDMA_EVT_OUT_FIFO_EMPTY_CH1 191
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#define GDMA_EVT_OUT_FIFO_EMPTY_CH2 192
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#define GDMA_EVT_OUT_FIFO_EMPTY_CH3 193
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#define GDMA_EVT_OUT_FIFO_EMPTY_CH4 194
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#define GDMA_EVT_OUT_FIFO_FULL_CH0 195
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#define GDMA_EVT_OUT_FIFO_FULL_CH1 196
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#define GDMA_EVT_OUT_FIFO_FULL_CH2 197
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#define GDMA_EVT_OUT_FIFO_FULL_CH3 198
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#define GDMA_EVT_OUT_FIFO_FULL_CH4 199
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#define PMU_EVT_SLEEP_WEEKUP 200
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#define MODEM_EVT_G0 201
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#define MODEM_EVT_G1 202
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#define MODEM_EVT_G2 203
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#define MODEM_EVT_G3 204
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#define ZERO_DET_EVT_CHANNEL_1_POS 205
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#define ZERO_DET_EVT_CHANNEL_2_POS 206
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#define ZERO_DET_EVT_CHANNEL_3_POS 207
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#define ZERO_DET_EVT_CHANNEL_1_NEG 208
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#define ZERO_DET_EVT_CHANNEL_2_NEG 209
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#define ZERO_DET_EVT_CHANNEL_3_NEG 210
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#define GPIO_TASK_CH0_SET 1
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#define GPIO_TASK_CH1_SET 2
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#define GPIO_TASK_CH2_SET 3
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#define GPIO_TASK_CH3_SET 4
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#define GPIO_TASK_CH4_SET 5
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#define GPIO_TASK_CH5_SET 6
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#define GPIO_TASK_CH6_SET 7
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#define GPIO_TASK_CH7_SET 8
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#define GPIO_TASK_CH0_CLEAR 9
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#define GPIO_TASK_CH1_CLEAR 10
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#define GPIO_TASK_CH2_CLEAR 11
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#define GPIO_TASK_CH3_CLEAR 12
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#define GPIO_TASK_CH4_CLEAR 13
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#define GPIO_TASK_CH5_CLEAR 14
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#define GPIO_TASK_CH6_CLEAR 15
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#define GPIO_TASK_CH7_CLEAR 16
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#define GPIO_TASK_CH0_TOGGLE 17
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#define GPIO_TASK_CH1_TOGGLE 18
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#define GPIO_TASK_CH2_TOGGLE 19
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#define GPIO_TASK_CH3_TOGGLE 20
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#define GPIO_TASK_CH4_TOGGLE 21
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#define GPIO_TASK_CH5_TOGGLE 22
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#define GPIO_TASK_CH6_TOGGLE 23
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#define GPIO_TASK_CH7_TOGGLE 24
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#define LEDC_TASK_TIMER0_RES_UPDATE 25
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#define LEDC_TASK_TIMER1_RES_UPDATE 26
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#define LEDC_TASK_TIMER2_RES_UPDATE 27
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#define LEDC_TASK_TIMER3_RES_UPDATE 28
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH0 29
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH1 30
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH2 31
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH3 32
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH4 33
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH5 34
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH6 35
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#define LEDC_TASK_DUTY_SCALE_UPDATE_CH7 36
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#define LEDC_TASK_TIMER0_CAP 37
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#define LEDC_TASK_TIMER1_CAP 38
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#define LEDC_TASK_TIMER2_CAP 39
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#define LEDC_TASK_TIMER3_CAP 40
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#define LEDC_TASK_SIG_OUT_DIS_CH0 41
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#define LEDC_TASK_SIG_OUT_DIS_CH1 42
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#define LEDC_TASK_SIG_OUT_DIS_CH2 43
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#define LEDC_TASK_SIG_OUT_DIS_CH3 44
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#define LEDC_TASK_SIG_OUT_DIS_CH4 45
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#define LEDC_TASK_SIG_OUT_DIS_CH5 46
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#define LEDC_TASK_SIG_OUT_DIS_CH6 47
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#define LEDC_TASK_SIG_OUT_DIS_CH7 48
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#define LEDC_TASK_OVF_CNT_RST_CH0 49
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#define LEDC_TASK_OVF_CNT_RST_CH1 50
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#define LEDC_TASK_OVF_CNT_RST_CH2 51
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#define LEDC_TASK_OVF_CNT_RST_CH3 52
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#define LEDC_TASK_OVF_CNT_RST_CH4 53
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#define LEDC_TASK_OVF_CNT_RST_CH5 54
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#define LEDC_TASK_OVF_CNT_RST_CH6 55
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#define LEDC_TASK_OVF_CNT_RST_CH7 56
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#define LEDC_TASK_TIMER0_RST 57
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#define LEDC_TASK_TIMER1_RST 58
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#define LEDC_TASK_TIMER2_RST 59
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#define LEDC_TASK_TIMER3_RST 60
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#define LEDC_TASK_TIMER0_RESUME 61
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#define LEDC_TASK_TIMER1_RESUME 62
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#define LEDC_TASK_TIMER2_RESUME 63
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#define LEDC_TASK_TIMER3_RESUME 64
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#define LEDC_TASK_TIMER0_PAUSE 65
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#define LEDC_TASK_TIMER1_PAUSE 66
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#define LEDC_TASK_TIMER2_PAUSE 67
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#define LEDC_TASK_TIMER3_PAUSE 68
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#define LEDC_TASK_FADE_RESTART_CH0 69
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#define LEDC_TASK_FADE_RESTART_CH1 70
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#define LEDC_TASK_FADE_RESTART_CH2 71
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#define LEDC_TASK_FADE_RESTART_CH3 72
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#define LEDC_TASK_FADE_RESTART_CH4 73
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#define LEDC_TASK_FADE_RESTART_CH5 74
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#define LEDC_TASK_FADE_RESTART_CH6 75
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#define LEDC_TASK_FADE_RESTART_CH7 76
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#define LEDC_TASK_FADE_PAUSE_CH0 77
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#define LEDC_TASK_FADE_PAUSE_CH1 78
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#define LEDC_TASK_FADE_PAUSE_CH2 79
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#define LEDC_TASK_FADE_PAUSE_CH3 80
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#define LEDC_TASK_FADE_PAUSE_CH4 81
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#define LEDC_TASK_FADE_PAUSE_CH5 82
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#define LEDC_TASK_FADE_PAUSE_CH6 83
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#define LEDC_TASK_FADE_PAUSE_CH7 84
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#define LEDC_TASK_FADE_RESUME_CH0 85
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#define LEDC_TASK_FADE_RESUME_CH1 86
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#define LEDC_TASK_FADE_RESUME_CH2 87
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#define LEDC_TASK_FADE_RESUME_CH3 88
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#define LEDC_TASK_FADE_RESUME_CH4 89
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#define LEDC_TASK_FADE_RESUME_CH5 90
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#define LEDC_TASK_FADE_RESUME_CH6 91
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#define LEDC_TASK_FADE_RESUME_CH7 92
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#define TG0_TASK_CNT_START_TIMER0 93
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#define TG0_TASK_ALARM_START_TIMER0 94
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#define TG0_TASK_CNT_STOP_TIMER0 95
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#define TG0_TASK_CNT_RELOAD_TIMER0 96
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#define TG0_TASK_CNT_CAP_TIMER0 97
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#define TG1_TASK_CNT_START_TIMER0 98
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#define TG1_TASK_ALARM_START_TIMER0 99
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#define TG1_TASK_CNT_STOP_TIMER0 100
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#define TG1_TASK_CNT_RELOAD_TIMER0 101
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#define TG1_TASK_CNT_CAP_TIMER0 102
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#define MCPWM0_TASK_CMPR0_A_UP 103
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#define MCPWM0_TASK_CMPR1_A_UP 104
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#define MCPWM0_TASK_CMPR2_A_UP 105
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#define MCPWM0_TASK_CMPR0_B_UP 106
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#define MCPWM0_TASK_CMPR1_B_UP 107
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#define MCPWM0_TASK_CMPR2_B_UP 108
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#define MCPWM0_TASK_GEN_STOP 109
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#define MCPWM0_TASK_TIMER0_SYN 110
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#define MCPWM0_TASK_TIMER1_SYN 111
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#define MCPWM0_TASK_TIMER2_SYN 112
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#define MCPWM0_TASK_TIMER0_PERIOD_UP 113
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#define MCPWM0_TASK_TIMER1_PERIOD_UP 114
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#define MCPWM0_TASK_TIMER2_PERIOD_UP 115
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#define MCPWM0_TASK_TZ0_OST 116
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#define MCPWM0_TASK_TZ1_OST 117
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#define MCPWM0_TASK_TZ2_OST 118
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#define MCPWM0_TASK_CLR0_OST 119
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#define MCPWM0_TASK_CLR1_OST 120
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#define MCPWM0_TASK_CLR2_OST 121
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#define MCPWM0_TASK_CAP0 122
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#define MCPWM0_TASK_CAP1 123
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#define MCPWM0_TASK_CAP2 124
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#define MCPWM1_TASK_CMPR0_A_UP 125
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#define MCPWM1_TASK_CMPR1_A_UP 126
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#define MCPWM1_TASK_CMPR2_A_UP 127
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#define MCPWM1_TASK_CMPR0_B_UP 128
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#define MCPWM1_TASK_CMPR1_B_UP 129
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#define MCPWM1_TASK_CMPR2_B_UP 130
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#define MCPWM1_TASK_GEN_STOP 131
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#define MCPWM1_TASK_TIMER0_SYN 132
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#define MCPWM1_TASK_TIMER1_SYN 133
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#define MCPWM1_TASK_TIMER2_SYN 134
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#define MCPWM1_TASK_TIMER0_PERIOD_UP 135
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#define MCPWM1_TASK_TIMER1_PERIOD_UP 136
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#define MCPWM1_TASK_TIMER2_PERIOD_UP 137
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#define MCPWM1_TASK_TZ0_OST 138
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#define MCPWM1_TASK_TZ1_OST 139
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#define MCPWM1_TASK_TZ2_OST 140
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#define MCPWM1_TASK_CLR0_OST 141
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#define MCPWM1_TASK_CLR1_OST 142
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#define MCPWM1_TASK_CLR2_OST 143
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#define MCPWM1_TASK_CAP0 144
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#define MCPWM1_TASK_CAP1 145
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#define MCPWM1_TASK_CAP2 146
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#define ADC_TASK_SAMPLE0 147
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#define ADC_TASK_SAMPLE1 148
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#define ADC_TASK_START0 149
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#define ADC_TASK_STOP0 150
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#define REGDMA_TASK_START0 151
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#define REGDMA_TASK_START1 152
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#define REGDMA_TASK_START2 153
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#define REGDMA_TASK_START3 154
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#define TMPSNSR_TASK_START_SAMPLE 155
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#define TMPSNSR_TASK_STOP_SAMPLE 156
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#define I2S0_TASK_START_RX 157
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#define I2S0_TASK_START_TX 158
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#define I2S0_TASK_STOP_RX 159
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#define I2S0_TASK_STOP_TX 160
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#define I2S0_TASK_SYNC_CHECK 161
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#define GDMA_TASK_IN_START_CH0 168
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#define GDMA_TASK_IN_START_CH1 169
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#define GDMA_TASK_IN_START_CH2 170
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#define GDMA_TASK_IN_START_CH3 171
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#define GDMA_TASK_IN_START_CH4 172
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#define GDMA_TASK_OUT_START_CH0 173
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#define GDMA_TASK_OUT_START_CH1 174
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#define GDMA_TASK_OUT_START_CH2 175
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#define GDMA_TASK_OUT_START_CH3 176
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#define GDMA_TASK_OUT_START_CH4 177
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#define PMU_TASK_SLEEP_REQ 178
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#define MODEM_TASK_G0 179
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#define MODEM_TASK_G1 180
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#define MODEM_TASK_G2 181
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#define MODEM_TASK_G3 182
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#define ZERO_DET_TASK_START 183
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