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124 lines
3.6 KiB
C
124 lines
3.6 KiB
C
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include <sys/param.h>
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#include "esp_spi_flash.h"
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#include "soc/system_reg.h"
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#include "soc/soc_memory_layout.h"
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#include "esp32s2/rom/spi_flash.h"
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#include "esp32s2/rom/cache.h"
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#include "bootloader_flash.h"
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#include "hal/spi_flash_hal.h"
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#include "esp_flash.h"
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#include "esp_log.h"
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static const char *TAG = "spiflash_s2";
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#define SPICACHE SPIMEM0
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#define SPIFLASH SPIMEM1
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extern void IRAM_ATTR flash_rom_init(void);
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esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_addr, const void *src, size_t size)
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{
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const spi_flash_guard_funcs_t *ops = spi_flash_guard_get();
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esp_rom_spiflash_result_t rc;
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assert((dest_addr % 16) == 0);
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assert((size % 16) == 0);
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if (!esp_ptr_internal(src)) {
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uint8_t block[128]; // Need to buffer in RAM as we write
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while (size > 0) {
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size_t next_block = MIN(size, sizeof(block));
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memcpy(block, src, next_block);
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esp_rom_spiflash_result_t r = spi_flash_write_encrypted_chip(dest_addr, block, next_block);
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if (r != ESP_ROM_SPIFLASH_RESULT_OK) {
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return r;
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}
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size -= next_block;
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dest_addr += next_block;
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src = ((uint8_t *)src) + next_block;
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}
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bzero(block, sizeof(block));
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return ESP_ROM_SPIFLASH_RESULT_OK;
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}
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else { // Already in internal memory
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ESP_LOGV(TAG, "calling SPI_Encrypt_Write addr 0x%x src %p size 0x%x", dest_addr, src, size);
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#ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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/* The ROM function SPI_Encrypt_Write assumes ADDR_BITLEN is already set but new
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implementation doesn't automatically set this to a usable value */
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SPIFLASH.user1.usr_addr_bitlen = 23;
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#endif
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if (ops && ops->start) {
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ops->start();
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}
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flash_rom_init();
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rc = SPI_Encrypt_Write(dest_addr, src, size);
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if (ops && ops->end) {
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ops->end();
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}
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return rc;
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}
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}
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esp_err_t spi_flash_wrap_set(spi_flash_wrap_mode_t mode)
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{
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return bootloader_flash_wrap_set(mode);
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}
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esp_err_t spi_flash_enable_wrap(uint32_t wrap_size)
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{
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switch(wrap_size) {
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case 8:
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return bootloader_flash_wrap_set(FLASH_WRAP_MODE_8B);
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case 16:
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return bootloader_flash_wrap_set(FLASH_WRAP_MODE_16B);
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case 32:
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return bootloader_flash_wrap_set(FLASH_WRAP_MODE_32B);
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case 64:
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return bootloader_flash_wrap_set(FLASH_WRAP_MODE_64B);
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default:
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return ESP_FAIL;
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}
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}
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void spi_flash_disable_wrap(void)
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{
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bootloader_flash_wrap_set(FLASH_WRAP_MODE_DISABLE);
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}
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bool spi_flash_support_wrap_size(uint32_t wrap_size)
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{
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if (!REG_GET_BIT(SPI_MEM_CTRL_REG(0), SPI_MEM_FREAD_QIO) || !REG_GET_BIT(SPI_MEM_CTRL_REG(0), SPI_MEM_FASTRD_MODE)){
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return ESP_FAIL;
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}
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switch(wrap_size) {
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case 0:
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case 8:
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case 16:
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case 32:
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case 64:
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return true;
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default:
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return false;
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}
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}
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