mirror of
https://github.com/espressif/esp-idf.git
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182 lines
5.5 KiB
C
182 lines
5.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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HS Instance:
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Configuration Set ID: 11
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*/
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/* 3.1 Basic Config Parameters */
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#define OTG20_MODE 0
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#define OTG20_ARCHITECTURE 2
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#define OTG20_SINGLE_POINT 1
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#define OTG20_ENABLE_LPM 0
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#define OTG20_EN_DED_TX_FIFO 1
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#define OTG20_EN_DESC_DMA 1
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#define OTG20_MULTI_PROC_INTRPT 1
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/* 3.2 USB Physical Layer Interface Parameters */
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#define OTG20_HSPHY_INTERFACE 3 // Although we support both UTMI+ and ULPI, the ULPI is not wired out of the USB-DWC. Hence only UTMI+ can be used
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#define OTG20_HSPHY_DWIDTH 2
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#define OTG20_FSPHY_INTERFACE 2
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#define OTG20_ENABLE_IC_USB 0
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#define OTG20_ENABLE_HSIC 0
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#define OTG20_I2C_INTERFACE 0
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#define OTG20_ULPI_CARKIT 1
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#define OTG20_ADP_SUPPORT 1
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#define OTG20_BC_SUPPORT 0
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#define OTG20_VENDOR_CTL_INTERFACE 1
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/* 3.3 Device Endpoint Configuration Parameters */
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#define OTG20_NUM_EPS 15
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#define OTG20_NUM_IN_EPS 8
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#define OTG20_NUM_CRL_EPS 1
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/* 3.4 Host Endpoint Configuration Parameters */
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#define OTG20_NUM_HOST_CHAN 16
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#define OTG20_EN_PERIO_HOST 1
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/* 3.5 Endpoint Channel FIFO Configuration Parameters */
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#define OTG20_DFIFO_DEPTH 1024
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#define OTG20_DFIFO_DYNAMIC 1
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#define OTG20_RX_DFIFO_DEPTH 1024
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#define OTG20_TX_HNPERIO_DFIFO_DEPTH 1024
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#define OTG20_TX_HPERIO_DFIFO_DEPTH 1024
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#define OTG20_NPERIO_TX_QUEUE_DEPTH 4
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#define OTG20_PERIO_TX_QUEUE_DEPTH 4
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/* 3.6 Additional Configuration Options Parameters */
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#define OTG20_TRANS_COUNT_WIDTH 17
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#define OTG20_PACKET_COUNT_WIDTH 8
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#define OTG20_RM_OPT_FEATURES 1
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#define OTG20_EN_PWROPT 1
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#define OTG20_SYNC_RESET_TYPE 0
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#define OTG20_EN_IDDIG_FILTER 1
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#define OTG20_EN_VBUSVALID_FILTER 1
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#define OTG20_EN_A_VALID_FILTER 1
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#define OTG20_EN_B_VALID_FILTER 1
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#define OTG20_EN_SESSIONEND_FILTER 1
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#define OTG20_EXCP_CNTL_XFER_FLOW 1
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#define OTG20_PWR_CLAMP 0
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#define OTG20_PWR_SWITCH_POLARITY 0
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/* 3.7 Endpoint Direction Parameters */
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#define OTG20_EP_DIR_1 0
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#define OTG20_EP_DIR_2 0
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#define OTG20_EP_DIR_3 0
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#define OTG20_EP_DIR_4 0
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#define OTG20_EP_DIR_5 0
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#define OTG20_EP_DIR_6 0
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#define OTG20_EP_DIR_7 0
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#define OTG20_EP_DIR_8 0
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#define OTG20_EP_DIR_9 0
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#define OTG20_EP_DIR_10 0
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#define OTG20_EP_DIR_11 0
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#define OTG20_EP_DIR_12 0
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#define OTG20_EP_DIR_13 0
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#define OTG20_EP_DIR_14 0
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#define OTG20_EP_DIR_15 0
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/* 3.8 Device Periodic FIFO Depth Parameters */
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/* 3.9 Device IN Endpoint FIFO Depth Parameters */
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#define OTG20_TX_DINEP_DFIFO_DEPTH_0 512
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#define OTG20_TX_DINEP_DFIFO_DEPTH_1 512
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#define OTG20_TX_DINEP_DFIFO_DEPTH_2 512
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#define OTG20_TX_DINEP_DFIFO_DEPTH_3 512
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#define OTG20_TX_DINEP_DFIFO_DEPTH_4 512
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#define OTG20_TX_DINEP_DFIFO_DEPTH_5 512
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#define OTG20_TX_DINEP_DFIFO_DEPTH_6 512
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#define OTG20_TX_DINEP_DFIFO_DEPTH_7 512
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/* 3.10 UTMI-To-UTMI Bridge Component Parameters */
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#define OTG20_U2UB_EN 0
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/*
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FS Instance:
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Configuration Set ID: 1
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*/
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/* 3.1 Basic Config Parameters */
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#define OTG11_MODE 0
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#define OTG11_ARCHITECTURE 2
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#define OTG11_SINGLE_POINT 1
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#define OTG11_ENABLE_LPM 0
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#define OTG11_EN_DED_TX_FIFO 1
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#define OTG11_EN_DESC_DMA 1
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#define OTG11_MULTI_PROC_INTRPT 0
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/* 3.2 USB Physical Layer Interface Parameters */
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#define OTG11_HSPHY_INTERFACE 0
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#define OTG11_FSPHY_INTERFACE 1
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#define OTG11_ENABLE_IC_USB 0
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#define OTG11_I2C_INTERFACE 0
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#define OTG11_ADP_SUPPORT 0
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#define OTG11_BC_SUPPORT 0
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/* 3.3 Device Endpoint Configuration Parameters */
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#define OTG11_NUM_EPS 6
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#define OTG11_NUM_IN_EPS 5
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#define OTG11_NUM_CRL_EPS 0
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/* 3.4 Host Endpoint Configuration Parameters */
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#define OTG11_NUM_HOST_CHAN 8
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#define OTG11_EN_PERIO_HOST 1
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/* 3.5 Endpoint Channel FIFO Configuration Parameters */
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#define OTG11_DFIFO_DEPTH 256
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#define OTG11_DFIFO_DYNAMIC 1
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#define OTG11_RX_DFIFO_DEPTH 256
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#define OTG11_TX_HNPERIO_DFIFO_DEPTH 256
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#define OTG11_TX_NPERIO_DFIFO_DEPTH 256
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#define OTG11_TX_HPERIO_DFIFO_DEPTH 256
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#define OTG11_NPERIO_TX_QUEUE_DEPTH 4
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#define OTG11_PERIO_TX_QUEUE_DEPTH 8
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/* 3.6 Additional Configuration Options Parameters */
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#define OTG11_TRANS_COUNT_WIDTH 16
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#define OTG11_PACKET_COUNT_WIDTH 7
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#define OTG11_RM_OPT_FEATURES 1
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#define OTG11_EN_PWROPT 1
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#define OTG11_SYNC_RESET_TYPE 0
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#define OTG11_EN_IDDIG_FILTER 1
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#define OTG11_EN_VBUSVALID_FILTER 1
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#define OTG11_EN_A_VALID_FILTER 1
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#define OTG11_EN_B_VALID_FILTER 1
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#define OTG11_EN_SESSIONEND_FILTER 1
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#define OTG11_EXCP_CNTL_XFER_FLOW 1
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#define OTG11_PWR_CLAMP 0
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#define OTG11_PWR_SWITCH_POLARITY 0
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/* 3.7 Endpoint Direction Parameters */
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#define OTG11_EP_DIR_1 0
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#define OTG11_EP_DIR_2 0
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#define OTG11_EP_DIR_3 0
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#define OTG11_EP_DIR_4 0
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#define OTG11_EP_DIR_5 0
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#define OTG11_EP_DIR_6 0
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/* 3.8 Device Periodic FIFO Depth Parameters */
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/* 3.9 Device IN Endpoint FIFO Depth Parameters */
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#define OTG11_TX_DINEP_DFIFO_DEPTH_1 256
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#define OTG11_TX_DINEP_DFIFO_DEPTH_2 256
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#define OTG11_TX_DINEP_DFIFO_DEPTH_3 256
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#define OTG11_TX_DINEP_DFIFO_DEPTH_4 256
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/* 3.10 UTMI-To-UTMI Bridge Component Parameters */
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#define OTG11_U2UB_EN 0
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#ifdef __cplusplus
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}
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#endif
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