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38d30548d4ae308413565b51f60c76099fcc005f
esp-idf/components/ulp/ulp_riscv/ulp_core
History
Marius Vikhammer ffed60cc93 ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-05 18:16:31 +08:00
..
include
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-05 18:16:31 +08:00
start.S
ulp-riscv: add support for using ADC as well as an example show-casing it.
2022-07-11 09:31:22 +08:00
ulp_riscv_adc.c
ulp: migrate tests to pytest embedded
2022-08-03 09:36:17 +08:00
ulp_riscv_lock.c
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-05 18:16:31 +08:00
ulp_riscv_print.c
Add ULP-RISCV print and bitbanged UART tx API
2022-07-29 12:18:01 +08:00
ulp_riscv_uart.c
Add ULP-RISCV print and bitbanged UART tx API
2022-07-29 12:18:01 +08:00
ulp_riscv_utils.c
ulp-riscv: made ulp_riscv_delay_cycles more accurate
2022-07-26 14:32:39 +08:00
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