Song Ruo Jing 3aa27ae960 refactor(regi2c): add LL function to control analog i2c master clock

2024-07-24 12:26:59 +08:00

..

include/hal

refactor(regi2c): add LL function to control analog i2c master clock

2024-07-24 12:26:59 +08:00

clk_tree_hal.c

feat(clk): Add basic clock support for esp32c5 mp

2024-06-26 14:26:34 +08:00

efuse_hal.c

feat: enabled ecdsa support for c5

2024-05-28 17:33:05 +05:30

modem_clock_hal.c

change(pm): esp32c5 hardware does not have clk_fe_cal_160m_en

2024-03-26 19:59:05 +08:00

pau_hal.c

fix(ci): bypass c5mp ci check

2024-04-10 20:45:49 +08:00

pmu_hal.c

change(esp32c5): update soc files for esp32c5 beta3

2023-12-28 10:23:15 +08:00