Marius Vikhammer 41a291fee0 fix(wdt): changed WDT clock source to XTAL for C6/H2 ...

Previously it used PLL, but PLL could potentially be powered down by power-management
when CPU frequency changed.

2023-09-13 10:45:51 +08:00

..

include/hal

fix(wdt): changed WDT clock source to XTAL for C6/H2

2023-09-13 10:45:51 +08:00

clk_tree_hal.c

clk_tree: Add a general API to get the frequency of different clocks

2023-01-17 11:30:24 +08:00

efuse_hal.c

Merge branch 'bugfix/update_esp32c6eco1_sleep_fosc_cal_cycles_backport_v5.1' into 'release/v5.1'

2023-05-18 19:52:05 +08:00

modem_clock_hal.c

modem clock: provide a protected wifipwr clock enable/disable interface to fix the bug of selecting xtal as the low power clock source for ble

2023-07-14 11:07:34 +08:00

pau_hal.c

pau: fix logic error in extra link retention

2023-06-13 21:06:29 +08:00

pmu_hal.c

pmu: add hal layer codes for esp32c6

2023-01-31 22:12:27 +08:00