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52 lines
2.3 KiB
C
52 lines
2.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include "sdkconfig.h"
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#include "soc/ext_mem_defs.h"
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#include "../ext_mem_layout.h"
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#include "hal/mmu_types.h"
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/* NOTE: With ESP-TEE enabled:
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* - The start address is moved by the size of TEE IDROM segments since these
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* segments are placed at the start of the linear address space
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* - TEE IROM and DROM segments are both 64KB (CONFIG_SECURE_TEE_IROM_SIZE,
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* CONFIG_SECURE_TEE_DROM_SIZE) for now. Thus, the number of reserved entries
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* from the start would be (64KB + 64KB)/MMU_PAGE_SIZE
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* - The last few MMU entries are reserved for TEE flash operations. The number
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* of reserved entries matches the size of TEE IDROM segments (IROM + DROM)
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* plus one additional entry, i.e. (64KB + 64KB)/MMU_PAGE_SIZE + 1
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*/
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#if CONFIG_SECURE_ENABLE_TEE
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#define TEE_MMU_MEM_REG_START_OFFS (CONFIG_SECURE_TEE_IROM_SIZE + CONFIG_SECURE_TEE_DROM_SIZE)
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#define TEE_MMU_RESV_PAGES ((CONFIG_SECURE_TEE_IROM_SIZE + CONFIG_SECURE_TEE_DROM_SIZE) / CONFIG_MMU_PAGE_SIZE)
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#define TEE_MMU_MEM_REG_END_OFFS ((TEE_MMU_RESV_PAGES + 1) * CONFIG_MMU_PAGE_SIZE)
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#define MMU_MEM_REG_START_ADDR_W_TEE (SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW + TEE_MMU_MEM_REG_START_OFFS)
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#define MMU_MEM_REG_END_ADDR_W_TEE (SOC_MMU_IRAM0_LINEAR_ADDRESS_HIGH - TEE_MMU_MEM_REG_END_OFFS)
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#define MMU_IRAM0_LINEAR_ADDRESS_LOW MMU_MEM_REG_START_ADDR_W_TEE
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#define MMU_IRAM0_LINEAR_ADDRESS_HIGH MMU_MEM_REG_END_ADDR_W_TEE
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#else
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#define MMU_IRAM0_LINEAR_ADDRESS_LOW SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW
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#define MMU_IRAM0_LINEAR_ADDRESS_HIGH SOC_MMU_IRAM0_LINEAR_ADDRESS_HIGH
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#endif
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/**
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* The start addresses in this list should always be sorted from low to high, as MMU driver will need to
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* coalesce adjacent regions
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*/
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const mmu_mem_region_t g_mmu_mem_regions[SOC_MMU_LINEAR_ADDRESS_REGION_NUM] = {
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[0] = {
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.start = MMU_IRAM0_LINEAR_ADDRESS_LOW,
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.end = MMU_IRAM0_LINEAR_ADDRESS_HIGH,
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.size = MMU_IRAM0_LINEAR_ADDRESS_HIGH - MMU_IRAM0_LINEAR_ADDRESS_LOW,
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.bus_id = CACHE_BUS_IBUS0 | CACHE_BUS_DBUS0,
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.targets = MMU_TARGET_FLASH0,
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.caps = MMU_MEM_CAP_EXEC | MMU_MEM_CAP_READ | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
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},
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};
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