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58 lines
2.2 KiB
C
58 lines
2.2 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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// MSPI IOMUX PINs
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#define MSPI_FUNC_NUM 0
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#define MSPI_IOMUX_PIN_NUM_CS1 26
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#define MSPI_IOMUX_PIN_NUM_HD 27
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#define MSPI_IOMUX_PIN_NUM_WP 28
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#define MSPI_IOMUX_PIN_NUM_CS0 29
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#define MSPI_IOMUX_PIN_NUM_CLK 30
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#define MSPI_IOMUX_PIN_NUM_MISO 31
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#define MSPI_IOMUX_PIN_NUM_MOSI 32
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#define MSPI_IOMUX_PIN_NUM_D4 33
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#define MSPI_IOMUX_PIN_NUM_D5 34
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#define MSPI_IOMUX_PIN_NUM_D6 35
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#define MSPI_IOMUX_PIN_NUM_D7 36
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#define MSPI_IOMUX_PIN_NUM_DQS 37
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// There are 2 sets of GPIO pins which could be routed to FSPICS0, FSPICLK, FSPID, FSPIQ, FSPIHD, FSPIWP.
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// However, there is only one set of GPIO pins which could be routed to FSPIIO4, FSPIIO5, FSPIIO6, FSPIIO7.
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// As default (when we are not going to use Octal SPI), we make use of SPI2_FUNC_NUM to route one of the 2 sets of GPIO pins to FSPICS0 ~ FSPIWP as follows.
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#define SPI2_FUNC_NUM 4
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#define SPI2_IOMUX_PIN_NUM_HD 9
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#define SPI2_IOMUX_PIN_NUM_CS 10
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#define SPI2_IOMUX_PIN_NUM_MOSI 11
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#define SPI2_IOMUX_PIN_NUM_CLK 12
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#define SPI2_IOMUX_PIN_NUM_MISO 13
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#define SPI2_IOMUX_PIN_NUM_WP 14
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// When using Octal SPI, we make use of SPI2_FUNC_NUM_OCT to route them as follows.
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#define SPI2_FUNC_NUM_OCT 2
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#define SPI2_IOMUX_PIN_NUM_HD_OCT 33
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#define SPI2_IOMUX_PIN_NUM_CS_OCT 34
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#define SPI2_IOMUX_PIN_NUM_MOSI_OCT 35
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#define SPI2_IOMUX_PIN_NUM_CLK_OCT 36
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#define SPI2_IOMUX_PIN_NUM_MISO_OCT 37
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#define SPI2_IOMUX_PIN_NUM_WP_OCT 38
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#define SPI2_IOMUX_PIN_NUM_IO4_OCT 10
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#define SPI2_IOMUX_PIN_NUM_IO5_OCT 11
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#define SPI2_IOMUX_PIN_NUM_IO6_OCT 12
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#define SPI2_IOMUX_PIN_NUM_IO7_OCT 13
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//SPI3 has no iomux pins
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//Following Macros are deprecated. Please use the Macros above
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#define FSPI_FUNC_NUM SPI2_FUNC_NUM
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#define FSPI_IOMUX_PIN_NUM_HD SPI2_IOMUX_PIN_NUM_HD
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#define FSPI_IOMUX_PIN_NUM_CS SPI2_IOMUX_PIN_NUM_CS
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#define FSPI_IOMUX_PIN_NUM_MOSI SPI2_IOMUX_PIN_NUM_MOSI
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#define FSPI_IOMUX_PIN_NUM_CLK SPI2_IOMUX_PIN_NUM_CLK
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#define FSPI_IOMUX_PIN_NUM_MISO SPI2_IOMUX_PIN_NUM_MISO
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#define FSPI_IOMUX_PIN_NUM_WP SPI2_IOMUX_PIN_NUM_WP
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