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465ff85d2bbfe5d1a65d3afadfc7555be7f50b51
esp-idf/components/soc/esp32c3/include/soc
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wuzhenghui dc93eb533a fix(esp_hw_support): add timer wakeup sleep duration check 
Closes https://github.com/espressif/esp-idf/issues/15255
2025-02-07 19:43:54 +08:00
..
adc_channel.h
adc: make adc_channel.h macros work with ng driver
2023-01-09 14:25:24 +08:00
bb_reg.h
…
boot_mode.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
clk_tree_defs.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
clkout_channel.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
dport_access.h
refactor(soc): sort esp32c3 soc headers
2024-10-11 16:29:30 +08:00
efuse_defs.h
feat(efuse): Add flash efuses for esp32c3
2023-07-11 19:49:17 +08:00
ext_mem_defs.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
fe_reg.h
…
gdma_channel.h
feat(esp_gdma): add hal interface for common operations
2023-07-10 13:45:57 +08:00
gpio_num.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
gpio_pins.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
gpio_sig_map.h
i2s: support 4 line pdm rx on esp32s3
2022-11-04 15:46:34 +08:00
hwcrypto_reg.h
esp32c3: xts-aes register prefix discrepency
2023-05-25 11:27:10 +05:30
interrupt_reg.h
refactor(soc): sort esp32c3 soc headers
2024-10-11 16:29:30 +08:00
interrupts.h
change(soc): Fix spelling mistake in soc/interrupts.h
2025-01-24 10:46:47 +08:00
Kconfig.soc_caps.in
fix(esp_hw_support): add timer wakeup sleep duration check
2025-02-07 19:43:54 +08:00
memprot_defs.h
memprot: Fix incorrect faulting address reported for esp32c3 & esp32s3
2023-02-16 15:27:11 +05:30
mmu.h
change(soc): added SOC_ prefix to mmu defs
2023-09-05 15:47:26 +08:00
periph_defs.h
refactor(i2s): rename the confusing port number
2024-10-23 18:16:57 +08:00
regi2c_bbpll.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_bias.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_brownout.h
G0: RISC-V targets have now an independent G0 layer
2022-06-14 15:00:53 +08:00
regi2c_defs.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
regi2c_dig_reg.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_lp_bias.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_saradc.h
G0: RISC-V targets have now an independent G0 layer
2022-06-14 15:00:53 +08:00
reset_reasons.h
refactor(soc): reformat code with astyle
2024-11-22 11:09:38 +08:00
soc_caps.h
fix(esp_hw_support): add timer wakeup sleep duration check
2025-02-07 19:43:54 +08:00
soc_pins.h
…
soc.h
refactor(soc): sort esp32c3 soc headers
2024-10-11 16:29:30 +08:00
spi_pins.h
fix(mspi): collect mspi iomux pin macro from iomux_reg.h to spi_pins.h
2024-09-03 13:55:00 +08:00
system_intr.h
feat(intr): clean up and support interrupts on H21
2025-01-20 15:10:30 +08:00
uart_channel.h
uart: fixed incorrect channel number on ESP32S2, S3 and C3
2022-03-01 18:21:27 +08:00
uart_pins.h
…
wdev_reg.h
fix(soc): Add the unavailable TRM mentioned RNG_DATA_REG register for C2 and C3
2025-01-24 10:50:05 +05:30