Logo
Explore Help
Sign In
alex/esp-idf
1
0
Fork 0
You've already forked esp-idf
mirror of https://github.com/espressif/esp-idf.git synced 2025-09-30 19:19:21 +00:00
Code Issues Packages Projects Releases Wiki Activity
Files
48d55e22e763e7361719c732d85b7961dc47327e
esp-idf/components/soc
History
Ivan Grokhotkov 48d55e22e7 soc/rtc: run 32k XTAL startup test only in PSRAM config
PSRAM tests run on ESP-WROVER-KIT boards, which have the 32k XTAL
installed.
2018-03-26 10:14:13 +08:00
..
esp32
soc/rtc: run 32k XTAL startup test only in PSRAM config
2018-03-26 10:14:13 +08:00
include/soc
Especially when internal memory fills up, some FreeRTOS structures (queues etc) get allocated in psram. These structures also contain a spinlock, which needs an atomic-compare-swap operation to work. The psram hardware, however, does not support this operation. As a workaround, this patch detects these spinlocks and will, instead of S32C1I, use equivalent C-code to simulate the behaviour, with an (internal) mux for atomicity.
2018-02-02 17:11:06 +08:00
test
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
component.mk
Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
2017-09-04 12:05:49 +08:00
Powered by Gitea Version: 1.24.6 Page: 581ms Template: 84ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API