mirror of
https://github.com/espressif/esp-idf.git
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83c686c744
- vTaskPreemptionDisable()/vTaskPreemptionEnable() are no longer available in single-core builds. - xTaskIncrementTick() calls must now be wrapped by critical section - Minimal Idle Task renamed to Passive Idle Task - Port critical section APIs updated
154 lines
4.4 KiB
ArmAsm
154 lines
4.4 KiB
ArmAsm
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#include "portmacro.h"
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#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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#include "esp_private/hw_stack_guard.h"
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#endif
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#if CONFIG_FREERTOS_UNICORE
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#define pxCurrentTCBs pxCurrentTCB
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#endif
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.global uxInterruptNesting
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.global uxSchedulerRunning
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.global xIsrStackTop
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.global pxCurrentTCBs
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.global vTaskSwitchContext
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.global xPortSwitchFlag
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#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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.global xIsrStack
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.global port_offset_pxStack
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.global port_offset_pxEndOfStack
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.global esp_hw_stack_guard_monitor_stop
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.global esp_hw_stack_guard_monitor_start
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.global esp_hw_stack_guard_set_bounds
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#endif /* CONFIG_ESP_SYSTEM_HW_STACK_GUARD */
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.section .text
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/**
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* This function makes the RTOS aware about a ISR entering, it takes the
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* current task stack saved, places into the TCB, loads the ISR stack.
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* TODO: ISR nesting code improvements ?
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*/
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.global rtos_int_enter
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.type rtos_int_enter, @function
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rtos_int_enter:
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/* scheduler not enabled, jump directly to ISR handler */
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lw t0, uxSchedulerRunning
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beq t0,zero, rtos_enter_end
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/* increments the ISR nesting count */
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la t3, uxInterruptNesting
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lw t4, 0x0(t3)
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addi t5,t4,1
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sw t5, 0x0(t3)
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/* If reached here from another low-prio ISR, skip stack pushing to TCB */
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bne t4,zero, rtos_enter_end
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#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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/* esp_hw_stack_guard_monitor_stop(); pass the scratch registers */
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ESP_HW_STACK_GUARD_MONITOR_STOP_CUR_CORE a0 a1
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#endif /* CONFIG_ESP_SYSTEM_HW_STACK_GUARD */
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/* Save current TCB and load the ISR stack */
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lw t0, pxCurrentTCBs
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sw sp, 0x0(t0)
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lw sp, xIsrStackTop
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#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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/* esp_hw_stack_guard_set_bounds(xIsrStack, xIsrStackTop); */
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la a0, xIsrStack
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mv a1, sp
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ESP_HW_STACK_GUARD_SET_BOUNDS_CUR_CORE a2
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/* esp_hw_stack_guard_monitor_start(); */
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ESP_HW_STACK_GUARD_MONITOR_START_CUR_CORE a0 a1
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#endif /* CONFIG_ESP_SYSTEM_HW_STACK_GUARD */
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rtos_enter_end:
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ret
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/**
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* @brief Restore the stack pointer of the next task to run.
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*
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* @param a0 Former mstatus
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*
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* @returns New mstatus
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*/
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.global rtos_int_exit
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.type rtos_int_exit, @function
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rtos_int_exit:
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/* To speed up this routine and because this current routine is only meant to be called from the interrupt
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* handler, let's use callee-saved registers instead of stack space. Registers `s3-s11` are not used by
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* the caller */
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mv s11, a0
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/* may skip RTOS aware interrupt since scheduler was not started */
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lw t0, uxSchedulerRunning
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beq t0,zero, rtos_exit_end
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/* update nesting interrupts counter */
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la t2, uxInterruptNesting
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lw t3, 0x0(t2)
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/* Already zero, protect against underflow */
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beq t3, zero, isr_skip_decrement
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addi t3,t3, -1
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sw t3, 0x0(t2)
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isr_skip_decrement:
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/* may still have interrupts pending, skip section below and exit */
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bne t3,zero,rtos_exit_end
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/* Schedule the next task if a yield is pending */
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la t0, xPortSwitchFlag
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lw t2, 0x0(t0)
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beq t2, zero, no_switch
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/* preserve return address and schedule next task
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stack pointer for riscv should always be 16 byte aligned */
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addi sp,sp,-16
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sw ra, 0(sp)
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/* vTaskSwitchContext(xCoreID) now expects xCoreID as an argument, so the assembly calls below have been modified. xCoreID is hard-wired to 0 for single-core risc-v. */
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li a0, 0
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call vTaskSwitchContext
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lw ra, 0(sp)
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addi sp, sp, 16
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/* Clears the switch pending flag */
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la t0, xPortSwitchFlag
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mv t2, zero
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sw t2, 0x0(t0)
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no_switch:
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#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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/* esp_hw_stack_guard_monitor_stop(); */
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ESP_HW_STACK_GUARD_MONITOR_STOP_CUR_CORE a0 a1
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#endif /* CONFIG_ESP_SYSTEM_HW_STACK_GUARD */
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/* Recover the stack of next task */
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lw t0, pxCurrentTCBs
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lw sp, 0x0(t0)
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#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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/* esp_hw_stack_guard_set_bounds(pxCurrentTCBs[0]->pxStack,
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* pxCurrentTCBs[0]->pxEndOfStack);
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*/
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lw a0, PORT_OFFSET_PX_STACK(t0)
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lw a1, PORT_OFFSET_PX_END_OF_STACK(t0)
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ESP_HW_STACK_GUARD_SET_BOUNDS_CUR_CORE a2
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/* esp_hw_stack_guard_monitor_start(); */
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ESP_HW_STACK_GUARD_MONITOR_START_CUR_CORE a0 a1
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#endif /* CONFIG_ESP_SYSTEM_HW_STACK_GUARD */
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rtos_exit_end:
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mv a0, s11 /* a0 = new mstatus */
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ret
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