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https://github.com/espressif/esp-idf.git
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359af26736
It seems gcc is not producing debug information for sections which are not properly marked as "ax", resulting in missing debug info for _vector_table, _interrupt_handler and _panic_handler. This can be verified e.g. with readelf --debug=info ./build/esp-idf/riscv/CMakeFiles/__idf_riscv.dir/vectors.S.obj readelf -SW ./build/esp-idf/riscv/CMakeFiles/__idf_riscv.dir/vectors.S.obj for hello_world example on esp32c3 target. Mark the .exception_vectors.text and .exception_vectors_table.text sections as writable and allocatable so the debug info sections are generated. Signed-off-by: Frantisek Hrbata <frantisek.hrbata@espressif.com>
91 lines
3.9 KiB
ArmAsm
91 lines
3.9 KiB
ArmAsm
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#include "soc/soc.h"
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#if ETS_INT_WDT_INUM != 24
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#error "ETS_INT_WDT_INUM expected to be 24"
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#endif
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/* If memory protection interrupts are meant to trigger a panic, attach them to panic handler,
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* else, attach them to the interrupt handler. */
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#if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#define MEMPROT_ISR _panic_handler
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#else
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#define MEMPROT_ISR _interrupt_handler
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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/* Same goes for the assist debug interrupt */
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#if CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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#define ASTDBG_ISR _panic_handler
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#else
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#define ASTDBG_ISR _interrupt_handler
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#endif // CONFIG_ESP_SYSTEM_HW_STACK_GUARD
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/* Handlers defined in the `vector.S` file, common to all RISC-V targets */
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.global _interrupt_handler
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.global _panic_handler
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.section .exception_vectors_table.text, "ax"
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/* This is the vector table. MTVEC points here.
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*
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* Use 4-byte instructions here. 1 instruction = 1 entry of the table.
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* The CPU jumps to MTVEC (i.e. the first entry) in case of an exception,
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* and (MTVEC & 0xfffffffc) + (mcause & 0x7fffffff) * 4, in case of an interrupt.
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*
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* Note: for our CPU, we need to place this on a 256-byte boundary, as CPU
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* only uses the 24 MSBs of the MTVEC, i.e. (MTVEC & 0xffffff00).
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*/
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.balign 0x100
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/* Since each entry must take 4-byte, let's temporarily disable the compressed
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* instruction set that could potentially generate 2-byte instructions. */
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.option push
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.option norvc
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.global _vector_table
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.type _vector_table, @function
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_vector_table:
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j _panic_handler /* 0: Exception entry */
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j _interrupt_handler /* 1: Free interrupt number */
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j _interrupt_handler /* 2: Free interrupt number */
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j _interrupt_handler /* 3: Free interrupt number */
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j _interrupt_handler /* 4: Free interrupt number */
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j _interrupt_handler /* 5: Free interrupt number */
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j _interrupt_handler /* 6: Free interrupt number */
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j _interrupt_handler /* 7: Free interrupt number */
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j _interrupt_handler /* 8: Free interrupt number */
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j _interrupt_handler /* 9: Free interrupt number */
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j _interrupt_handler /* 10: Free interrupt number */
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j _interrupt_handler /* 11: Free interrupt number */
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j _interrupt_handler /* 12: Free interrupt number */
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j _interrupt_handler /* 13: Free interrupt number */
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j _interrupt_handler /* 14: Free interrupt number */
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j _interrupt_handler /* 15: Free interrupt number */
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j _interrupt_handler /* 16: Free interrupt number */
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j _interrupt_handler /* 17: Free interrupt number */
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j _interrupt_handler /* 18: Free interrupt number */
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j _interrupt_handler /* 19: Free interrupt number */
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j _interrupt_handler /* 20: Free interrupt number */
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j _interrupt_handler /* 21: Free interrupt number */
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j _interrupt_handler /* 22: Free interrupt number */
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j _interrupt_handler /* 23: Free interrupt number */
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j _panic_handler /* 24: ETS_INT_WDT_INUM panic-interrupt (soc-level panic) */
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j _panic_handler /* 25: ETS_CACHEERR_INUM panic-interrupt (soc-level panic) */
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j MEMPROT_ISR /* 26: ETS_MEMPROT_ERR_INUM handler (soc-level panic) */
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j ASTDBG_ISR /* 27: ETS_ASSIST_DEBUG_INUM handler (soc-level panic) */
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j _interrupt_handler /* 28: Free interrupt number */
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j _interrupt_handler /* 29: Free interrupt number */
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j _interrupt_handler /* 30: Free interrupt number */
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j _interrupt_handler /* 31: Free interrupt number */
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.size _vector_table, .-_vector_table
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/* Re-enable the compressed instruction set it is was enabled before */
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.option pop
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