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180 lines
9.4 KiB
C
180 lines
9.4 KiB
C
/*********************************************************************
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* SEGGER Microcontroller GmbH & Co. KG *
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* The Embedded Experts *
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**********************************************************************
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* *
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* (c) 2015 - 2017 SEGGER Microcontroller GmbH & Co. KG *
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* *
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* www.segger.com Support: support@segger.com *
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* *
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**********************************************************************
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* *
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* SEGGER SystemView * Real-time application analysis *
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* *
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**********************************************************************
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* *
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* All rights reserved. *
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* *
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* SEGGER strongly recommends to not make any changes *
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* to or modify the source code of this software in order to stay *
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* compatible with the RTT protocol and J-Link. *
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* *
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* Redistribution and use in source and binary forms, with or *
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* without modification, are permitted provided that the following *
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* conditions are met: *
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* *
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* o Redistributions of source code must retain the above copyright *
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* notice, this list of conditions and the following disclaimer. *
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* *
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* o Redistributions in binary form must reproduce the above *
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* copyright notice, this list of conditions and the following *
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* disclaimer in the documentation and/or other materials provided *
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* with the distribution. *
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* *
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* o Neither the name of SEGGER Microcontroller GmbH & Co. KG *
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* nor the names of its contributors may be used to endorse or *
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* promote products derived from this software without specific *
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* prior written permission. *
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* *
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
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* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
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* DAMAGE. *
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* *
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**********************************************************************
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* *
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* SystemView version: V2.42 *
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* *
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**********************************************************************
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-------------------------- END-OF-HEADER -----------------------------
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File : SEGGER_SYSVIEW_Conf.h
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Purpose : SEGGER SystemView configuration.
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Revision: $Rev: 5927 $
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*/
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#ifndef SEGGER_SYSVIEW_CONF_H
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#define SEGGER_SYSVIEW_CONF_H
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#include "soc/soc.h"
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/*********************************************************************
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*
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* Defines, fixed
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*
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**********************************************************************
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*/
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//
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// Constants for known core configuration
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//
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#define SEGGER_SYSVIEW_CORE_OTHER 0
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#define SEGGER_SYSVIEW_CORE_CM0 1 // Cortex-M0/M0+/M1
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#define SEGGER_SYSVIEW_CORE_CM3 2 // Cortex-M3/M4/M7
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#define SEGGER_SYSVIEW_CORE_RX 3 // Renesas RX
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#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)
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#ifdef __ARM_ARCH_6M__
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
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#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
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#endif
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#elif defined(__ICCARM__)
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#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
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#elif ((defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)))
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
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#endif
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#elif defined(__CC_ARM)
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#if (defined(__TARGET_ARCH_6S_M))
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
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#elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
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#endif
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#elif defined(__TI_ARM__)
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#ifdef __TI_ARM_V6M0__
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
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#elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__))
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
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#endif
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#elif defined(__ICCRX__)
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
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#elif defined(__RX)
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
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#endif
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#ifndef SEGGER_SYSVIEW_CORE
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#define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER
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#endif
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/*********************************************************************
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*
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* Defines, configurable
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*
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**********************************************************************
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*/
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/*********************************************************************
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*
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* SystemView buffer configuration
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*/
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#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE 1024 // Number of bytes that SystemView uses for the buffer.
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#define SEGGER_SYSVIEW_RTT_CHANNEL 1 // The RTT channel that SystemView will use. 0: Auto selection
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#define SEGGER_SYSVIEW_USE_STATIC_BUFFER 1 // Use a static buffer to generate events instead of a buffer on the stack
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#define SEGGER_SYSVIEW_POST_MORTEM_MODE 0 // 1: Enable post mortem analysis mode
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/*********************************************************************
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*
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* SystemView timestamp configuration
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*/
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#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
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#define SEGGER_SYSVIEW_GET_TIMESTAMP() (*(U32 *)(0xE0001004)) // Retrieve a system timestamp. Cortex-M cycle counter.
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#define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by clock source
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#else
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#define SEGGER_SYSVIEW_GET_TIMESTAMP() SEGGER_SYSVIEW_X_GetTimestamp() // Retrieve a system timestamp via user-defined function
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#define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by SEGGER_SYSVIEW_X_GetTimestamp()
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#endif
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/*********************************************************************
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*
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* SystemView Id configuration
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*/
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//TODO: optimise it
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#define SEGGER_SYSVIEW_ID_BASE SOC_DROM_LOW // Default value for the lowest Id reported by the application. Can be overridden by the application via SEGGER_SYSVIEW_SetRAMBase(). (i.e. 0x20000000 when all Ids are an address in this RAM)
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#define SEGGER_SYSVIEW_ID_SHIFT 0 // Number of bits to shift the Id to save bandwidth. (i.e. 2 when Ids are 4 byte aligned)
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/*********************************************************************
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*
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* SystemView interrupt configuration
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*/
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#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
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#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x1FF) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector)
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#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0
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#if defined(__ICCARM__)
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#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() (__get_IPSR()) // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead.
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#else
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#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector)
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#endif
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#else
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#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function.
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#endif
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unsigned SEGGER_SYSVIEW_X_SysView_Lock(void);
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void SEGGER_SYSVIEW_X_SysView_Unlock(unsigned int_state);
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// to be recursive save IRQ status on the stack of the caller
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#define SEGGER_SYSVIEW_LOCK() unsigned _SYSVIEW_int_state = SEGGER_SYSVIEW_X_SysView_Lock()
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#define SEGGER_SYSVIEW_UNLOCK() SEGGER_SYSVIEW_X_SysView_Unlock(_SYSVIEW_int_state)
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#endif // SEGGER_SYSVIEW_CONF_H
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/*************************** End of file ****************************/
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