Jiang Jiang Jian 6a879bf2d2 Merge branch 'bugfix/fix_maximum_value_of_config_rtc_clk_cal_cycles_bug' into 'master' ...

ESP All Chip: fixed the maximum value of config RTC_CLK_CAL_SYCLES bug

See merge request espressif/esp-idf!29423

2024-03-14 10:44:17 +08:00

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include/soc

feat(clk): preliminary clock tree support for ESP32C5

2024-02-07 14:38:15 +08:00

private_include

fix(esp32c5): fixed the lack of crosscore ll on c5

2024-02-05 12:39:35 +08:00

chip_info.c

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CMakeLists.txt

fix(esp32c5): fixed the lack of crosscore ll on c5

2024-02-05 12:39:35 +08:00

cpu_region_protect.c

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esp_clk_tree.c

feat(uart): add HP/LP uart support on ESP32C5

2024-02-29 14:12:51 +08:00

esp_cpu_intr.c

refactor(esp_hw_support): changed reserved interrupt functions to be now defined per SoC

2024-02-28 15:21:10 +08:00

esp_crypto_lock.c

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io_mux.c

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Kconfig.hw_support

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Kconfig.mac

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Kconfig.rtc

fix: fix_maximum_value_of_config_rtc_clk_cal_cycle_bug

2024-03-05 19:33:30 +08:00

pmu_init.c

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pmu_param.c

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rtc_clk_init.c

feat(clk): preliminary clock tree support for ESP32C5

2024-02-07 14:38:15 +08:00

rtc_clk.c

feat(esp_hw_support): support esp32p4 pll start/stop event callback

2024-03-10 10:51:28 +08:00

rtc_time.c

feat(clk): preliminary clock tree support for ESP32C5

2024-02-07 14:38:15 +08:00

sar_periph_ctrl.c

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systimer.c

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