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https://github.com/espressif/esp-idf.git
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83 lines
2.5 KiB
C
83 lines
2.5 KiB
C
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "soc/soc_caps.h"
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#include "hal/cp_dma_hal.h"
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#include "hal/cp_dma_ll.h"
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void cp_dma_hal_init(cp_dma_hal_context_t *hal, const cp_dma_hal_config_t *config)
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{
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hal->dev = &CP_DMA;
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cp_dma_ll_enable_clock(hal->dev, true);
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cp_dma_ll_reset_in_link(hal->dev);
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cp_dma_ll_reset_out_link(hal->dev);
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cp_dma_ll_reset_cmd_fifo(hal->dev);
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cp_dma_ll_reset_fifo(hal->dev);
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cp_dma_ll_enable_intr(hal->dev, UINT32_MAX, false);
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cp_dma_ll_clear_intr_status(hal->dev, UINT32_MAX);
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cp_dma_ll_enable_owner_check(hal->dev, true);
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}
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void cp_dma_hal_set_desc_base_addr(cp_dma_hal_context_t *hal, intptr_t outlink_base, intptr_t inlink_base)
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{
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/* set base address of the first descriptor */
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cp_dma_ll_tx_set_descriptor_base_addr(hal->dev, outlink_base);
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cp_dma_ll_rx_set_descriptor_base_addr(hal->dev, inlink_base);
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}
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void cp_dma_hal_deinit(cp_dma_hal_context_t *hal)
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{
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cp_dma_ll_enable_clock(hal->dev, false);
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hal->dev = NULL;
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}
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void cp_dma_hal_start(cp_dma_hal_context_t *hal)
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{
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// enable DMA engine
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cp_dma_ll_start_rx(hal->dev, true);
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cp_dma_ll_start_tx(hal->dev, true);
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// enable RX EOF interrupt
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cp_dma_ll_enable_intr(hal->dev, CP_DMA_LL_EVENT_RX_EOF, true);
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}
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void cp_dma_hal_stop(cp_dma_hal_context_t *hal)
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{
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// disable interrupt
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cp_dma_ll_enable_intr(hal->dev, CP_DMA_LL_EVENT_RX_EOF, false);
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// disable DMA
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cp_dma_ll_start_rx(hal->dev, false);
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cp_dma_ll_start_tx(hal->dev, false);
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}
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uint32_t cp_dma_hal_get_intr_status(cp_dma_hal_context_t *hal)
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{
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return cp_dma_ll_get_intr_status(hal->dev);
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}
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void cp_dma_hal_clear_intr_status(cp_dma_hal_context_t *hal, uint32_t mask)
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{
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cp_dma_ll_clear_intr_status(hal->dev, mask);
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}
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void cp_dma_hal_restart_tx(cp_dma_hal_context_t *hal)
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{
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cp_dma_ll_restart_tx(hal->dev);
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}
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void cp_dma_hal_restart_rx(cp_dma_hal_context_t *hal)
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{
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cp_dma_ll_restart_rx(hal->dev);
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}
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