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https://github.com/espressif/esp-idf.git
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8309e3e5ce
Since ulp wakeup signal are connected to ulp int raw(except esp32), we need to clear ulp int raw before sleep when ulp wakeup enabled. Otherwise, if the ulp int raw is already set, chip will not sleep properly. Closes https://github.com/espressif/esp-idf/issues/6229
58 lines
1.5 KiB
C
58 lines
1.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "soc/soc.h"
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#include "soc/rtc.h"
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#include "soc/rtc_cntl_reg.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t)
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{
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WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX);
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WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
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SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
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SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
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}
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static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void)
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{
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return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS);
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}
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static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
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{
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REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask);
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SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
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mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
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}
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static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void)
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{
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REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);
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}
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static inline void rtc_cntl_ll_ulp_wakeup_enable(void)
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{
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SET_PERI_REG_BITS(RTC_CNTL_STATE0_REG, RTC_CNTL_WAKEUP_ENA_V, 0x800, RTC_CNTL_WAKEUP_ENA_S);
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}
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static inline void rtc_cntl_ll_ulp_int_clear(void)
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{
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REG_SET_BIT(RTC_CNTL_INT_CLR_REG, RTC_CNTL_ULP_CP_INT_CLR);
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REG_SET_BIT(RTC_CNTL_INT_CLR_REG, RTC_CNTL_COCPU_INT_CLR);
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REG_SET_BIT(RTC_CNTL_INT_CLR_REG, RTC_CNTL_COCPU_TRAP_INT_CLR);
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}
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#ifdef __cplusplus
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}
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#endif
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