mirror of
https://github.com/espressif/esp-idf.git
synced 2025-10-30 20:51:41 +00:00
7b5508b6ff
This commit fixes an issue where in the FreeRTOS port layer would cause the portASSERT_IF_IN_ISR() assert check to fail even when the system is not in an interrupt context.
661 lines
25 KiB
C
661 lines
25 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#include <string.h>
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#include "soc/soc_caps.h"
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "hal/systimer_hal.h"
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#include "hal/systimer_ll.h"
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#include "riscv/rvruntime-frames.h"
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#include "riscv/rv_utils.h"
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#include "riscv/interrupt.h"
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#include "esp_private/crosscore_int.h"
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#include "esp_private/esp_int_wdt.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/systimer.h"
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#include "esp_attr.h"
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#include "esp_system.h"
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#include "esp_heap_caps_init.h"
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#include "esp_task_wdt.h"
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#include "esp_task.h"
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#include "esp_intr_alloc.h"
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#include "esp_log.h"
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#include "FreeRTOS.h" /* This pulls in portmacro.h */
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#include "task.h"
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#include "portmacro.h"
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#include "esp_memory_utils.h"
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#ifdef CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER
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#include "soc/periph_defs.h"
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#include "soc/system_reg.h"
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#include "hal/systimer_hal.h"
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#include "hal/systimer_ll.h"
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#endif
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#ifdef CONFIG_PM_TRACE
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#include "esp_private/pm_trace.h"
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#endif //CONFIG_PM_TRACE
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_Static_assert(portBYTE_ALIGNMENT == 16, "portBYTE_ALIGNMENT must be set to 16");
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/* ---------------------------------------------------- Variables ------------------------------------------------------
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*
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* ------------------------------------------------------------------------------------------------------------------ */
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BaseType_t uxSchedulerRunning = 0; // Duplicate of xSchedulerRunning, accessible to port files
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volatile UBaseType_t uxInterruptNesting = 0;
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portMUX_TYPE port_xTaskLock = portMUX_INITIALIZER_UNLOCKED;
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portMUX_TYPE port_xISRLock = portMUX_INITIALIZER_UNLOCKED;
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volatile BaseType_t xPortSwitchFlag = 0;
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__attribute__((aligned(16))) static StackType_t xIsrStack[configISR_STACK_SIZE];
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StackType_t *xIsrStackTop = &xIsrStack[0] + (configISR_STACK_SIZE & (~((portPOINTER_SIZE_TYPE)portBYTE_ALIGNMENT_MASK)));
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// Variables used for IDF style critical sections. These are orthogonal to FreeRTOS critical sections
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static UBaseType_t port_uxCriticalNestingIDF = 0;
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static UBaseType_t port_uxCriticalOldInterruptStateIDF = 0;
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/* ------------------------------------------------ IDF Compatibility --------------------------------------------------
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* - These need to be defined for IDF to compile
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* ------------------------------------------------------------------------------------------------------------------ */
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// ------------------ Critical Sections --------------------
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void vPortEnterCritical(void)
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{
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// Save current interrupt threshold and disable interrupts
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UBaseType_t old_thresh = ulPortSetInterruptMask();
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// Update the IDF critical nesting count
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port_uxCriticalNestingIDF++;
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if (port_uxCriticalNestingIDF == 1) {
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// Save a copy of the old interrupt threshold
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port_uxCriticalOldInterruptStateIDF = (UBaseType_t) old_thresh;
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}
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}
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void vPortExitCritical(void)
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{
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if (port_uxCriticalNestingIDF > 0) {
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port_uxCriticalNestingIDF--;
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if (port_uxCriticalNestingIDF == 0) {
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// Restore the saved interrupt threshold
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vPortClearInterruptMask((int)port_uxCriticalOldInterruptStateIDF);
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}
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}
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}
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// ----------------------- System --------------------------
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#define STACK_WATCH_AREA_SIZE 32
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#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
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void vPortSetStackWatchpoint(void *pxStackStart)
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{
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uint32_t addr = (uint32_t)pxStackStart;
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addr = (addr + (STACK_WATCH_AREA_SIZE - 1)) & (~(STACK_WATCH_AREA_SIZE - 1));
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esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, STACK_WATCH_AREA_SIZE, ESP_CPU_WATCHPOINT_STORE);
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}
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// ---------------------- Tick Timer -----------------------
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BaseType_t xPortSysTickHandler(void);
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#ifdef CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
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#ifdef CONFIG_FREERTOS_CORETIMER_0
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER0_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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#ifdef CONFIG_FREERTOS_CORETIMER_1
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#define SYSTICK_INTR_ID (ETS_INTERNAL_TIMER1_INTR_SOURCE+ETS_INTERNAL_INTR_SOURCE_OFF)
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#endif
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#elif CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER
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_Static_assert(SOC_CPU_CORES_NUM <= SOC_SYSTIMER_ALARM_NUM - 1, "the number of cores must match the number of core alarms in SYSTIMER");
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void SysTickIsrHandler(void *arg);
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static uint32_t s_handled_systicks[portNUM_PROCESSORS] = { 0 };
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#define SYSTICK_INTR_ID (ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE)
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/**
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* @brief Set up the systimer peripheral to generate the tick interrupt
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*
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* Both timer alarms are configured in periodic mode.
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* It is done at the same time so SysTicks for both CPUs occur at the same time or very close.
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* Shifts a time of triggering interrupts for core 0 and core 1.
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*/
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void vPortSetupTimer(void)
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{
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unsigned cpuid = xPortGetCoreID();
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#ifdef CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3
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const unsigned level = ESP_INTR_FLAG_LEVEL3;
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#else
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const unsigned level = ESP_INTR_FLAG_LEVEL1;
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#endif
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/* Systimer HAL layer object */
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static systimer_hal_context_t systimer_hal;
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/* set system timer interrupt vector */
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ESP_ERROR_CHECK(esp_intr_alloc(ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE + cpuid, ESP_INTR_FLAG_IRAM | level, SysTickIsrHandler, &systimer_hal, NULL));
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if (cpuid == 0) {
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periph_module_enable(PERIPH_SYSTIMER_MODULE);
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systimer_hal_init(&systimer_hal);
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systimer_hal_tick_rate_ops_t ops = {
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.ticks_to_us = systimer_ticks_to_us,
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.us_to_ticks = systimer_us_to_ticks,
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};
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systimer_hal_set_tick_rate_ops(&systimer_hal, &ops);
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systimer_ll_set_counter_value(systimer_hal.dev, SYSTIMER_COUNTER_OS_TICK, 0);
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systimer_ll_apply_counter_value(systimer_hal.dev, SYSTIMER_COUNTER_OS_TICK);
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for (cpuid = 0; cpuid < SOC_CPU_CORES_NUM; cpuid++) {
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// Set stall option and alarm mode to default state. Below they will be set to a required state.
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systimer_hal_counter_can_stall_by_cpu(&systimer_hal, SYSTIMER_COUNTER_OS_TICK, cpuid, false);
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uint32_t alarm_id = SYSTIMER_ALARM_OS_TICK_CORE0 + cpuid;
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systimer_hal_select_alarm_mode(&systimer_hal, alarm_id, SYSTIMER_ALARM_MODE_ONESHOT);
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}
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for (cpuid = 0; cpuid < portNUM_PROCESSORS; ++cpuid) {
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uint32_t alarm_id = SYSTIMER_ALARM_OS_TICK_CORE0 + cpuid;
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/* configure the timer */
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systimer_hal_connect_alarm_counter(&systimer_hal, alarm_id, SYSTIMER_COUNTER_OS_TICK);
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systimer_hal_set_alarm_period(&systimer_hal, alarm_id, 1000000UL / CONFIG_FREERTOS_HZ);
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systimer_hal_select_alarm_mode(&systimer_hal, alarm_id, SYSTIMER_ALARM_MODE_PERIOD);
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systimer_hal_counter_can_stall_by_cpu(&systimer_hal, SYSTIMER_COUNTER_OS_TICK, cpuid, true);
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if (cpuid == 0) {
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systimer_hal_enable_alarm_int(&systimer_hal, alarm_id);
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systimer_hal_enable_counter(&systimer_hal, SYSTIMER_COUNTER_OS_TICK);
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#ifndef CONFIG_FREERTOS_UNICORE
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// SysTick of core 0 and core 1 are shifted by half of period
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systimer_hal_counter_value_advance(&systimer_hal, SYSTIMER_COUNTER_OS_TICK, 1000000UL / CONFIG_FREERTOS_HZ / 2);
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#endif
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}
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}
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} else {
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uint32_t alarm_id = SYSTIMER_ALARM_OS_TICK_CORE0 + cpuid;
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systimer_hal_enable_alarm_int(&systimer_hal, alarm_id);
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}
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}
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/**
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* @brief Systimer interrupt handler.
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*
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* The Systimer interrupt for SysTick works in periodic mode no need to calc the next alarm.
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* If a timer interrupt is ever serviced more than one tick late, it is necessary to process multiple ticks.
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*/
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IRAM_ATTR void SysTickIsrHandler(void *arg)
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{
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uint32_t cpuid = xPortGetCoreID();
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systimer_hal_context_t *systimer_hal = (systimer_hal_context_t *)arg;
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_ENTER(TICK, cpuid);
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#endif
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uint32_t alarm_id = SYSTIMER_ALARM_OS_TICK_CORE0 + cpuid;
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do {
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systimer_ll_clear_alarm_int(systimer_hal->dev, alarm_id);
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uint32_t diff = systimer_hal_get_counter_value(systimer_hal, SYSTIMER_COUNTER_OS_TICK) / systimer_ll_get_alarm_period(systimer_hal->dev, alarm_id) - s_handled_systicks[cpuid];
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if (diff > 0) {
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if (s_handled_systicks[cpuid] == 0) {
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s_handled_systicks[cpuid] = diff;
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diff = 1;
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} else {
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s_handled_systicks[cpuid] += diff;
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}
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do {
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xPortSysTickHandler();
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} while (--diff);
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}
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} while (systimer_ll_is_alarm_int_fired(systimer_hal->dev, alarm_id));
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#ifdef CONFIG_PM_TRACE
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ESP_PM_TRACE_EXIT(TICK, cpuid);
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#endif
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}
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#endif // CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER
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/* ---------------------------------------------- Port Implementations -------------------------------------------------
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* Implementations of Porting Interface functions
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* ------------------------------------------------------------------------------------------------------------------ */
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// --------------------- Interrupts ------------------------
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UBaseType_t ulPortSetInterruptMask(void)
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{
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int ret;
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unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
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ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
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REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL);
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RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
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/**
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* In theory, this function should not return immediately as there is a
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* delay between the moment we mask the interrupt threshold register and
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* the moment a potential lower-priority interrupt is triggered (as said
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* above), it should have a delay of 2 machine cycles/instructions.
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*
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* However, in practice, this function has an epilogue of one instruction,
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* thus the instruction masking the interrupt threshold register is
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* followed by two instructions: `ret` and `csrrs` (RV_SET_CSR).
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* That's why we don't need any additional nop instructions here.
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*/
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return ret;
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}
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void vPortClearInterruptMask(UBaseType_t mask)
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{
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REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask);
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/**
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* The delay between the moment we unmask the interrupt threshold register
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* and the moment the potential requested interrupt is triggered is not
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* null: up to three machine cycles/instructions can be executed.
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*
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* When compilation size optimization is enabled, this function and its
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* callers returning void will have NO epilogue, thus the instruction
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* following these calls will be executed.
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*
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* If the requested interrupt is a context switch to a higher priority
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* task then the one currently running, we MUST NOT execute any instruction
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* before the interrupt effectively happens.
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* In order to prevent this, force this routine to have a 3-instruction
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* delay before exiting.
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*/
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asm volatile ( "nop" );
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asm volatile ( "nop" );
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asm volatile ( "nop" );
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}
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BaseType_t xPortCheckIfInISR(void)
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{
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return uxInterruptNesting;
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}
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void vPortAssertIfInISR(void)
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{
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/* Assert if the interrupt nesting count is > 0 */
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configASSERT(xPortCheckIfInISR() == 0);
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}
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// ------------------ Critical Sections --------------------
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void IRAM_ATTR vPortTakeLock( portMUX_TYPE *lock )
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{
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spinlock_acquire( lock, portMUX_NO_TIMEOUT);
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}
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void IRAM_ATTR vPortReleaseLock( portMUX_TYPE *lock )
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{
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spinlock_release( lock );
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}
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// ---------------------- Yielding -------------------------
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void vPortYield(void)
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{
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if (uxInterruptNesting) {
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vPortYieldFromISR();
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} else {
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esp_crosscore_int_send_yield(0);
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/* There are 3-4 instructions of latency between triggering the software
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interrupt and the CPU interrupt happening. Make sure it happened before
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we return, otherwise vTaskDelay() may return and execute 1-2
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instructions before the delay actually happens.
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(We could use the WFI instruction here, but there is a chance that
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the interrupt will happen while evaluating the other two conditions
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for an instant yield, and if that happens then the WFI would be
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waiting for the next interrupt to occur...)
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*/
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while (uxSchedulerRunning && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) {}
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}
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}
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void vPortYieldFromISR( void )
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{
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//traceISR_EXIT_TO_SCHEDULER();
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uxSchedulerRunning = 1;
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xPortSwitchFlag = 1;
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}
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/* ------------------------------------------------ FreeRTOS Portable --------------------------------------------------
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* - Provides implementation for functions required by FreeRTOS
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* - Declared in portable.h
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* ------------------------------------------------------------------------------------------------------------------ */
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// ----------------- Scheduler Start/End -------------------
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BaseType_t xPortStartScheduler(void)
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{
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uxInterruptNesting = 0;
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port_uxCriticalNestingIDF = 0;
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uxSchedulerRunning = 0;
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/* Setup the hardware to generate the tick. */
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vPortSetupTimer();
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esprv_intc_int_set_threshold(1); /* set global INTC masking level */
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rv_utils_intr_global_enable();
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vPortYield();
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/*Should not get here*/
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return pdFALSE;
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}
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void vPortEndScheduler(void)
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{
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/* very unlikely this function will be called, so just trap here */
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abort();
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}
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// ------------------------ Stack --------------------------
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/**
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* @brief Align stack pointer in a downward growing stack
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*
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* This macro is used to round a stack pointer downwards to the nearest n-byte boundary, where n is a power of 2.
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* This macro is generally used when allocating aligned areas on a downward growing stack.
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*/
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#define STACKPTR_ALIGN_DOWN(n, ptr) ((ptr) & (~((n)-1)))
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/**
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* @brief Allocate and initialize GCC TLS area
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*
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* This function allocates and initializes the area on the stack used to store GCC TLS (Thread Local Storage) variables.
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* - The area's size is derived from the TLS section's linker variables, and rounded up to a multiple of 16 bytes
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* - The allocated area is aligned to a 16-byte aligned address
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* - The TLS variables in the area are then initialized
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*
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* Each task access the TLS variables using the THREADPTR register plus an offset to obtain the address of the variable.
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* The value for the THREADPTR register is also calculated by this function, and that value should be use to initialize
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* the THREADPTR register.
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*
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* @param[in] uxStackPointer Current stack pointer address
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* @param[out] ret_threadptr_reg_init Calculated THREADPTR register initialization value
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* @return Stack pointer that points to the TLS area
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*/
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FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackTLS(UBaseType_t uxStackPointer, uint32_t *ret_threadptr_reg_init)
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{
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/*
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TLS layout at link-time, where 0xNNN is the offset that the linker calculates to a particular TLS variable.
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LOW ADDRESS
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|---------------------------| Linker Symbols
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| Section | --------------
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| .flash.rodata |
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0x0|---------------------------| <- _flash_rodata_start
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^ | Other Data |
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| |---------------------------| <- _thread_local_start
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| | .tbss | ^
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V | | |
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0xNNN | int example; | | tls_area_size
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| | |
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| .tdata | V
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|---------------------------| <- _thread_local_end
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| Other data |
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| ... |
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|---------------------------|
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HIGH ADDRESS
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*/
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// Calculate TLS area size and round up to multiple of 16 bytes.
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extern char _thread_local_start, _thread_local_end, _flash_rodata_start;
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const uint32_t tls_area_size = ALIGNUP(16, (uint32_t)&_thread_local_end - (uint32_t)&_thread_local_start);
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// TODO: check that TLS area fits the stack
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// Allocate space for the TLS area on the stack. The area must be aligned to 16-bytes
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uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - (UBaseType_t)tls_area_size);
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// Initialize the TLS area with the initialization values of each TLS variable
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memcpy((void *)uxStackPointer, &_thread_local_start, tls_area_size);
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/*
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Calculate the THREADPTR register's initialization value based on the link-time offset and the TLS area allocated on
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the stack.
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HIGH ADDRESS
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|---------------------------|
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| .tdata (*) |
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^ | int example; |
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| | |
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| | .tbss (*) |
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| |---------------------------| <- uxStackPointer (start of TLS area)
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0xNNN | | | ^
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| | | |
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| ... | _thread_local_start - _rodata_start
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| | | |
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| | | V
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V | | <- threadptr register's value
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LOW ADDRESS
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*/
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*ret_threadptr_reg_init = (uint32_t)uxStackPointer - ((uint32_t)&_thread_local_start - (uint32_t)&_flash_rodata_start);
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return uxStackPointer;
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}
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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static void vPortTaskWrapper(TaskFunction_t pxCode, void *pvParameters)
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{
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__asm__ volatile(".cfi_undefined ra"); // tell to debugger that it's outermost (initial) frame
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extern void __attribute__((noreturn)) panic_abort(const char *details);
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static char DRAM_ATTR msg[80] = "FreeRTOS: FreeRTOS Task \"\0";
|
|
pxCode(pvParameters);
|
|
/* FreeRTOS tasks should not return. Log the task name and abort. */
|
|
/* We cannot use s(n)printf because it is in flash */
|
|
strcat(msg, pcTaskGetName(NULL));
|
|
strcat(msg, "\" should not return, Aborting now!");
|
|
panic_abort(msg);
|
|
}
|
|
#endif // CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
|
|
|
|
/**
|
|
* @brief Initialize the task's starting interrupt stack frame
|
|
*
|
|
* This function initializes the task's starting interrupt stack frame. The dispatcher will use this stack frame in a
|
|
* context restore routine. Therefore, the starting stack frame must be initialized as if the task was interrupted right
|
|
* before its first instruction is called.
|
|
*
|
|
* - The stack frame is allocated to a 16-byte aligned address
|
|
*
|
|
* @param[in] uxStackPointer Current stack pointer address
|
|
* @param[in] pxCode Task function
|
|
* @param[in] pvParameters Task function's parameter
|
|
* @param[in] threadptr_reg_init THREADPTR register initialization value
|
|
* @return Stack pointer that points to the stack frame
|
|
*/
|
|
FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackFrame(UBaseType_t uxStackPointer, TaskFunction_t pxCode, void *pvParameters, uint32_t threadptr_reg_init)
|
|
{
|
|
/*
|
|
Allocate space for the task's starting interrupt stack frame.
|
|
- The stack frame must be allocated to a 16-byte aligned address.
|
|
- We use RV_STK_FRMSZ (instead of sizeof(RvExcFrame)) as it rounds up the total size to a multiple of 16.
|
|
*/
|
|
uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - RV_STK_FRMSZ);
|
|
|
|
// Clear the entire interrupt stack frame
|
|
RvExcFrame *frame = (RvExcFrame *)uxStackPointer;
|
|
memset(frame, 0, sizeof(RvExcFrame));
|
|
|
|
/* Initialize the stack frame. */
|
|
extern uint32_t __global_pointer$;
|
|
#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
|
|
frame->mepc = (UBaseType_t)vPortTaskWrapper;
|
|
frame->a0 = (UBaseType_t)pxCode;
|
|
frame->a1 = (UBaseType_t)pvParameters;
|
|
#else
|
|
frame->mepc = (UBaseType_t)pxCode;
|
|
frame->a0 = (UBaseType_t)pvParameters;
|
|
#endif // CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
|
|
frame->gp = (UBaseType_t)&__global_pointer$;
|
|
frame->tp = (UBaseType_t)threadptr_reg_init;
|
|
|
|
return uxStackPointer;
|
|
}
|
|
|
|
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
|
|
{
|
|
#ifdef __clang_analyzer__
|
|
// Teach clang-tidy that pxTopOfStack cannot be a pointer to const
|
|
volatile StackType_t * pxTemp = pxTopOfStack;
|
|
pxTopOfStack = pxTemp;
|
|
#endif /*__clang_analyzer__ */
|
|
/*
|
|
HIGH ADDRESS
|
|
|---------------------------| <- pxTopOfStack on entry
|
|
| TLS Variables |
|
|
| ------------------------- | <- Start of usable stack
|
|
| Starting stack frame |
|
|
| ------------------------- | <- pxTopOfStack on return (which is the tasks current SP)
|
|
| | |
|
|
| | |
|
|
| V |
|
|
----------------------------- <- Bottom of stack
|
|
LOW ADDRESS
|
|
|
|
- All stack areas are aligned to 16 byte boundary
|
|
- We use UBaseType_t for all of stack area initialization functions for more convenient pointer arithmetic
|
|
*/
|
|
|
|
UBaseType_t uxStackPointer = (UBaseType_t)pxTopOfStack;
|
|
configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
|
|
|
|
// Initialize GCC TLS area
|
|
uint32_t threadptr_reg_init;
|
|
uxStackPointer = uxInitialiseStackTLS(uxStackPointer, &threadptr_reg_init);
|
|
configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
|
|
|
|
// Initialize the starting interrupt stack frame
|
|
uxStackPointer = uxInitialiseStackFrame(uxStackPointer, pxCode, pvParameters, threadptr_reg_init);
|
|
configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
|
|
|
|
// Return the task's current stack pointer address which should point to the starting interrupt stack frame
|
|
return (StackType_t *)uxStackPointer;
|
|
//TODO: IDF-2393
|
|
}
|
|
|
|
// ------- Thread Local Storage Pointers Deletion Callbacks -------
|
|
|
|
#if ( CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS )
|
|
void vPortTLSPointersDelCb( void *pxTCB )
|
|
{
|
|
/* Typecast pxTCB to StaticTask_t type to access TCB struct members.
|
|
* pvDummy15 corresponds to pvThreadLocalStoragePointers member of the TCB.
|
|
*/
|
|
StaticTask_t *tcb = ( StaticTask_t * )pxTCB;
|
|
|
|
/* The TLSP deletion callbacks are stored at an offset of (configNUM_THREAD_LOCAL_STORAGE_POINTERS/2) */
|
|
TlsDeleteCallbackFunction_t *pvThreadLocalStoragePointersDelCallback = ( TlsDeleteCallbackFunction_t * )( &( tcb->pvDummy15[ ( configNUM_THREAD_LOCAL_STORAGE_POINTERS / 2 ) ] ) );
|
|
|
|
/* We need to iterate over half the depth of the pvThreadLocalStoragePointers area
|
|
* to access all TLS pointers and their respective TLS deletion callbacks.
|
|
*/
|
|
for ( int x = 0; x < ( configNUM_THREAD_LOCAL_STORAGE_POINTERS / 2 ); x++ ) {
|
|
if ( pvThreadLocalStoragePointersDelCallback[ x ] != NULL ) { //If del cb is set
|
|
/* In case the TLSP deletion callback has been overwritten by a TLS pointer, gracefully abort. */
|
|
if ( !esp_ptr_executable( pvThreadLocalStoragePointersDelCallback[ x ] ) ) {
|
|
ESP_LOGE("FreeRTOS", "Fatal error: TLSP deletion callback at index %d overwritten with non-excutable pointer %p", x, pvThreadLocalStoragePointersDelCallback[ x ]);
|
|
abort();
|
|
}
|
|
|
|
pvThreadLocalStoragePointersDelCallback[ x ]( x, tcb->pvDummy15[ x ] ); //Call del cb
|
|
}
|
|
}
|
|
}
|
|
#endif // CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS
|
|
|
|
// -------------------- Tick Handler -----------------------
|
|
|
|
extern void esp_vApplicationIdleHook(void);
|
|
extern void esp_vApplicationTickHook(void);
|
|
|
|
BaseType_t xPortSysTickHandler(void)
|
|
{
|
|
#if configBENCHMARK
|
|
portbenchmarkIntLatency();
|
|
#endif //configBENCHMARK
|
|
traceISR_ENTER(SYSTICK_INTR_ID);
|
|
BaseType_t ret = xTaskIncrementTick();
|
|
//Manually call the IDF tick hooks
|
|
esp_vApplicationTickHook();
|
|
if (ret != pdFALSE) {
|
|
portYIELD_FROM_ISR();
|
|
} else {
|
|
traceISR_EXIT();
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
// ------------------- Hook Functions ----------------------
|
|
|
|
void __attribute__((weak)) vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName)
|
|
{
|
|
#define ERR_STR1 "***ERROR*** A stack overflow in task "
|
|
#define ERR_STR2 " has been detected."
|
|
const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2};
|
|
|
|
char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = {0};
|
|
|
|
char *dest = buf;
|
|
for (int i = 0; i < sizeof(str) / sizeof(str[0]); i++) {
|
|
dest = strcat(dest, str[i]);
|
|
}
|
|
esp_system_abort(buf);
|
|
}
|
|
|
|
#if ( configUSE_TICK_HOOK > 0 )
|
|
void vApplicationTickHook( void )
|
|
{
|
|
esp_vApplicationTickHook();
|
|
}
|
|
#endif
|
|
|
|
#if CONFIG_FREERTOS_USE_MINIMAL_IDLE_HOOK
|
|
/*
|
|
By default, the port uses vApplicationMinimalIdleHook() to run IDF style idle
|
|
hooks. However, users may also want to provide their own vApplicationMinimalIdleHook().
|
|
In this case, we use to -Wl,--wrap option to wrap the user provided vApplicationMinimalIdleHook()
|
|
*/
|
|
extern void __real_vApplicationMinimalIdleHook( void );
|
|
void __wrap_vApplicationMinimalIdleHook( void )
|
|
{
|
|
esp_vApplicationIdleHook(); //Run IDF style hooks
|
|
__real_vApplicationMinimalIdleHook(); //Call the user provided vApplicationMinimalIdleHook()
|
|
}
|
|
#else // CONFIG_FREERTOS_USE_MINIMAL_IDLE_HOOK
|
|
void vApplicationMinimalIdleHook( void )
|
|
{
|
|
esp_vApplicationIdleHook(); //Run IDF style hooks
|
|
}
|
|
#endif // CONFIG_FREERTOS_USE_MINIMAL_IDLE_HOOK
|
|
|
|
/*
|
|
* Hook function called during prvDeleteTCB() to cleanup any
|
|
* user defined static memory areas in the TCB.
|
|
*/
|
|
#if CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP
|
|
void __real_vPortCleanUpTCB( void *pxTCB );
|
|
|
|
void __wrap_vPortCleanUpTCB( void *pxTCB )
|
|
#else
|
|
void vPortCleanUpTCB ( void *pxTCB )
|
|
#endif /* CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP */
|
|
{
|
|
#if ( CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP )
|
|
/* Call user defined vPortCleanUpTCB */
|
|
__real_vPortCleanUpTCB( pxTCB );
|
|
#endif /* CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP */
|
|
|
|
#if ( CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS )
|
|
/* Call TLS pointers deletion callbacks */
|
|
vPortTLSPointersDelCb( pxTCB );
|
|
#endif /* CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS */
|
|
}
|