mirror of
https://github.com/espressif/esp-idf.git
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226 lines
7.3 KiB
C
226 lines
7.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <sys/param.h>
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#include <inttypes.h>
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#include <string.h>
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#include "sdkconfig.h"
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#include "esp_check.h"
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#include "esp_log.h"
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#include "esp_heap_caps.h"
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#include "esp_rom_caps.h"
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#include "soc/soc_caps.h"
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#include "hal/mmu_hal.h"
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#include "hal/cache_hal.h"
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#include "hal/cache_ll.h"
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#include "esp_cache.h"
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#include "esp_private/esp_cache_private.h"
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#include "esp_private/critical_section.h"
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static const char *TAG = "cache";
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#define ALIGN_UP_BY(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
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DEFINE_CRIT_SECTION_LOCK_STATIC(s_spinlock);
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esp_err_t esp_cache_msync(void *addr, size_t size, int flags)
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{
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ESP_RETURN_ON_FALSE_ISR(addr, ESP_ERR_INVALID_ARG, TAG, "null pointer");
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uint32_t addr_end = 0;
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bool ovf = __builtin_add_overflow((uint32_t)addr, size, &addr_end);
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ESP_EARLY_LOGV(TAG, "addr_end: 0x%" PRIx32, addr_end);
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ESP_RETURN_ON_FALSE_ISR(!ovf, ESP_ERR_INVALID_ARG, TAG, "wrong size, total size overflow");
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bool both_dir = (flags & ESP_CACHE_MSYNC_FLAG_DIR_C2M) && (flags & ESP_CACHE_MSYNC_FLAG_DIR_M2C);
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bool both_type = (flags & ESP_CACHE_MSYNC_FLAG_TYPE_DATA) && (flags & ESP_CACHE_MSYNC_FLAG_TYPE_INST);
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ESP_RETURN_ON_FALSE_ISR(!both_dir && !both_type, ESP_ERR_INVALID_ARG, TAG, "both C2M and M2C directions, or both data and instruction type are selected, you should only select one direction or one type");
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uint32_t vaddr = (uint32_t)addr;
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bool valid = false;
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uint32_t cache_level = 0;
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uint32_t cache_id = 0;
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valid = cache_hal_vaddr_to_cache_level_id(vaddr, size, &cache_level, &cache_id);
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ESP_RETURN_ON_FALSE_ISR(valid, ESP_ERR_INVALID_ARG, TAG, "invalid addr or null pointer");
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cache_type_t cache_type = CACHE_TYPE_DATA;
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if (flags & ESP_CACHE_MSYNC_FLAG_TYPE_INST) {
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cache_type = CACHE_TYPE_INSTRUCTION;
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}
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uint32_t cache_line_size = cache_hal_get_cache_line_size(cache_level, cache_type);
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if ((flags & ESP_CACHE_MSYNC_FLAG_UNALIGNED) == 0) {
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bool aligned_addr = (((uint32_t)addr % cache_line_size) == 0) && ((size % cache_line_size) == 0);
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ESP_RETURN_ON_FALSE_ISR(aligned_addr, ESP_ERR_INVALID_ARG, TAG, "start address: 0x%" PRIx32 ", or the size: 0x%" PRIx32 " is(are) not aligned with cache line size (0x%" PRIx32 ")B", (uint32_t)addr, (uint32_t)size, cache_line_size);
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}
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if (flags & ESP_CACHE_MSYNC_FLAG_DIR_M2C) {
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ESP_EARLY_LOGV(TAG, "M2C DIR");
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if (flags & ESP_CACHE_MSYNC_FLAG_UNALIGNED) {
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ESP_RETURN_ON_FALSE_ISR(false, ESP_ERR_INVALID_ARG, TAG, "M2C direction doesn't allow ESP_CACHE_MSYNC_FLAG_UNALIGNED");
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}
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esp_os_enter_critical_safe(&s_spinlock);
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//Add preload feature / flag here, IDF-7800
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valid = cache_hal_invalidate_addr(vaddr, size);
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esp_os_exit_critical_safe(&s_spinlock);
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assert(valid);
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} else {
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ESP_EARLY_LOGV(TAG, "C2M DIR");
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if (flags & ESP_CACHE_MSYNC_FLAG_TYPE_INST) {
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ESP_RETURN_ON_FALSE_ISR(false, ESP_ERR_INVALID_ARG, TAG, "C2M direction doesn't support instruction type");
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}
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#if SOC_CACHE_WRITEBACK_SUPPORTED
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esp_os_enter_critical_safe(&s_spinlock);
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valid = cache_hal_writeback_addr(vaddr, size);
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esp_os_exit_critical_safe(&s_spinlock);
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assert(valid);
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if (flags & ESP_CACHE_MSYNC_FLAG_INVALIDATE) {
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esp_os_enter_critical_safe(&s_spinlock);
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valid &= cache_hal_invalidate_addr(vaddr, size);
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esp_os_exit_critical_safe(&s_spinlock);
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}
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assert(valid);
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#endif
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}
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return ESP_OK;
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}
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esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t flags, void **out_ptr, size_t *actual_size)
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{
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ESP_RETURN_ON_FALSE_ISR(out_ptr, ESP_ERR_INVALID_ARG, TAG, "null pointer");
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uint32_t cache_level = CACHE_LL_LEVEL_INT_MEM;
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uint32_t heap_caps = 0;
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uint32_t data_cache_line_size = 0;
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void *ptr = NULL;
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if (flags & ESP_CACHE_MALLOC_FLAG_PSRAM) {
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cache_level = CACHE_LL_LEVEL_EXT_MEM;
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heap_caps |= MALLOC_CAP_SPIRAM;
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} else {
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heap_caps |= MALLOC_CAP_INTERNAL;
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if (flags & ESP_CACHE_MALLOC_FLAG_DMA) {
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heap_caps |= MALLOC_CAP_DMA;
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}
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}
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data_cache_line_size = cache_hal_get_cache_line_size(cache_level, CACHE_TYPE_DATA);
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if (data_cache_line_size == 0) {
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//default alignment
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data_cache_line_size = 4;
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}
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size = ALIGN_UP_BY(size, data_cache_line_size);
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ptr = heap_caps_aligned_alloc(data_cache_line_size, size, heap_caps);
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ESP_RETURN_ON_FALSE_ISR(ptr, ESP_ERR_NO_MEM, TAG, "no enough heap memory for (%"PRId32")B alignment", data_cache_line_size);
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*out_ptr = ptr;
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if (actual_size) {
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*actual_size = size;
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}
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return ESP_OK;
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}
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esp_err_t esp_cache_aligned_malloc_prefer(size_t size, void **out_ptr, size_t *actual_size, size_t flag_nums, ...)
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{
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ESP_RETURN_ON_FALSE_ISR(out_ptr, ESP_ERR_INVALID_ARG, TAG, "null pointer");
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esp_err_t ret = ESP_FAIL;
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va_list argp;
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uint32_t flags = 0;
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va_start(argp, flag_nums);
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*out_ptr = NULL;
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while (flag_nums--) {
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flags = va_arg(argp, uint32_t);
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ret = esp_cache_aligned_malloc(size, flags, out_ptr, actual_size);
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if (ret == ESP_OK) {
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break;
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}
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}
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va_end(argp);
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return ret;
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}
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esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t flags, void **out_ptr, size_t *actual_size)
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{
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ESP_RETURN_ON_FALSE_ISR(out_ptr, ESP_ERR_INVALID_ARG, TAG, "null pointer");
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esp_err_t ret = ESP_FAIL;
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size_t size_bytes = 0;
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bool ovf = false;
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ovf = __builtin_mul_overflow(n, size, &size_bytes);
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ESP_RETURN_ON_FALSE_ISR(!ovf, ESP_ERR_INVALID_ARG, TAG, "wrong size, total size overflow");
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void *ptr = NULL;
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ret = esp_cache_aligned_malloc(size_bytes, flags, &ptr, actual_size);
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if (ret == ESP_OK) {
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memset(ptr, 0, size_bytes);
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*out_ptr = ptr;
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}
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return ret;
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}
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esp_err_t esp_cache_aligned_calloc_prefer(size_t n, size_t size, void **out_ptr, size_t *actual_size, size_t flag_nums, ...)
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{
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ESP_RETURN_ON_FALSE_ISR(out_ptr, ESP_ERR_INVALID_ARG, TAG, "null pointer");
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esp_err_t ret = ESP_FAIL;
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size_t size_bytes = 0;
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bool ovf = false;
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*out_ptr = NULL;
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ovf = __builtin_mul_overflow(n, size, &size_bytes);
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ESP_RETURN_ON_FALSE_ISR(!ovf, ESP_ERR_INVALID_ARG, TAG, "wrong size, total size overflow");
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void *ptr = NULL;
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va_list argp;
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va_start(argp, flag_nums);
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int arg;
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for (int i = 0; i < flag_nums; i++) {
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arg = va_arg(argp, int);
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ret = esp_cache_aligned_malloc_prefer(size_bytes, &ptr, actual_size, flag_nums, arg);
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if (ret == ESP_OK) {
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memset(ptr, 0, size_bytes);
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*out_ptr = ptr;
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arg = va_arg(argp, int);
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break;
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}
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}
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va_end(argp);
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return ret;
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}
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esp_err_t esp_cache_get_alignment(uint32_t flags, size_t *out_alignment)
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{
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ESP_RETURN_ON_FALSE(out_alignment, ESP_ERR_INVALID_ARG, TAG, "null pointer");
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uint32_t cache_level = CACHE_LL_LEVEL_INT_MEM;
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uint32_t data_cache_line_size = 0;
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if (flags & ESP_CACHE_MALLOC_FLAG_PSRAM) {
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cache_level = CACHE_LL_LEVEL_EXT_MEM;
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}
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data_cache_line_size = cache_hal_get_cache_line_size(cache_level, CACHE_TYPE_DATA);
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*out_alignment = data_cache_line_size;
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return ESP_OK;
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}
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