Files
esp-idf/components/esp_lcd/linker.lf
morris eedbd9f8e3 feat(dsi): split the dphy config clock and pll reference clock
this is a breaking change in the esp32p4 ver3.0 silicon.
2025-09-15 22:52:01 +08:00

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[mapping:esp_lcd_dsi]
archive: libesp_lcd.a
entries:
if LCD_DSI_ISR_HANDLER_IN_IRAM = y:
esp_lcd_panel_dpi: mipi_dsi_dma_trans_done_cb (noflash)
[mapping:esp_lcd_dsi_dma]
archive: libesp_hw_support.a
entries:
if LCD_DSI_ISR_HANDLER_IN_IRAM = y:
# Control dw_gdma function placement granularly
dw_gdma: dw_gdma_link_list_get_item (noflash)
dw_gdma: dw_gdma_lli_set_block_markers (noflash)
dw_gdma: dw_gdma_channel_use_link_list (noflash)
dw_gdma: dw_gdma_channel_enable_ctrl (noflash)
[mapping:esp_lcd_rgb_dma]
archive: libesp_hw_support.a
entries:
if LCD_RGB_ISR_IRAM_SAFE = y:
gdma: gdma_reset (noflash)
gdma: gdma_start (noflash)
gdma_link: gdma_link_get_head_addr (noflash)
[mapping:esp_lcd_rgb_hal]
archive: libhal.a
entries:
if LCD_RGB_ISR_IRAM_SAFE = y:
lcd_hal: lcd_hal_cal_pclk_freq (noflash)
hal_utils: hal_utils_calc_clk_div_frac_fast (noflash)