Marius Vikhammer bf21cf0c99 aes/sha: change gdma transfer ability for sram to be 1 byte aligned ...

Previously GDMA transfer ability was set to 4 bytes, but buffers might
be not fulfill these requirements

2021-08-05 11:02:17 +08:00

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crts

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CMakeLists.txt

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component.mk

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test_aes_gcm.c

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test_aes_perf.c

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test_aes_sha_parallel.c

aes/sha: use a shared lazy allocated GDMA channel for AES and SHA

2021-03-09 09:23:05 +08:00

test_aes_sha_rsa.c

esp32: move dport_access

2021-07-16 20:14:26 +08:00

test_aes.c

aes/sha: change gdma transfer ability for sram to be 1 byte aligned

2021-08-05 11:02:17 +08:00

test_apb_dport_access.c

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test_apb_dport_access.h

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test_ecp.c

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test_esp_crt_bundle.c

mbedtls: fix crt_bundle test to ensure proper server start event

2021-07-13 13:20:16 +08:00

test_mbedtls_mpi.c

temporarily disable hardware encryption for esp32s3

2021-01-28 21:05:51 +08:00

test_mbedtls_sha.c

crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc

2021-05-18 11:25:41 +08:00

test_mbedtls.c

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test_rsa.c

ci: update performance test key to db compatible format

2021-06-21 14:17:45 +08:00

test_sha_perf.c

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test_sha.c

esp32s2: move crypto related functions

2021-07-16 20:14:26 +08:00