Omar Chebib 102d5bbf72 refactor(riscv): added a new API for the interrupts

2024-01-18 16:36:53 +08:00

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include/soc

refactor(riscv): added a new API for the interrupts

2024-01-18 16:36:53 +08:00

ld

fix(spi): Correct REG_SPI_BASE(i) macro for all targets

2023-11-17 02:39:28 +00:00

adc_periph.c

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dedic_gpio_periph.c

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gdma_periph.c

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gpio_periph.c

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i2c_periph.c

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interrupts.c

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ledc_periph.c

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spi_periph.c

fix(spi): correct some signals and dummy bits docs

2023-11-17 02:39:28 +00:00

temperature_sensor_periph.c

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timer_periph.c

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uart_periph.c

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