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	209702d055
	
	
	
		
			
			This commit updates the documentation and API descriptions of the esp_ipc and esp_ipc_isr features.
		
			
				
	
	
		
			90 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			90 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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|  *
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|  * SPDX-License-Identifier: Apache-2.0
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|  */
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| 
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| #include <xtensa/coreasm.h>
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| #include <xtensa/corebits.h>
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| #include <xtensa/config/system.h>
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| #include <xtensa/hal.h>
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| 
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| /* get_ps_other_cpu(void *arg)
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|  *
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|  * It should be called by the CALLX0 command from the handler of High-priority interrupt.
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|  * Only these registers [a2, a3, a4] can be used here.
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|  * Returns PS.
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|  */
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|     .section    .iram1, "ax"
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|     .align      4
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|     .global     get_ps_other_cpu
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|     .type       get_ps_other_cpu, @function
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| // Args:
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| // a2 - void* arg
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| get_ps_other_cpu:
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|     rsr     a3, PS
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|     s32i    a3, a2, 0
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|     ret
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| 
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| 
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| /* extended_ipc_isr_asm(void *arg)
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|  *
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|  * It should be called by the CALLX0 command from the handler of High-priority interrupt.
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|  * Only these registers [a2, a3, a4] can be used here.
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|  * This function receives a structure (arg) where can be saved some regs
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|  * to get them available here, at the end of the function we recover the saved regs.
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|  */
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|     .section    .iram1, "ax"
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|     .align      4
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|     .global     extended_ipc_isr_asm
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|     .type       extended_ipc_isr_asm, @function
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|     // Args:
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|     // a2 - arg_data_t* arg
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| extended_ipc_isr_asm:
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| 
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|     /* save all registers (a5-a15 -> regs[11]) */
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|     s32i    a5,  a2, 0
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|     s32i    a6,  a2, 4
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|     s32i    a7,  a2, 8
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|     s32i    a8,  a2, 12
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|     s32i    a9,  a2, 16
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|     s32i    a10, a2, 20
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|     s32i    a11, a2, 24
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|     s32i    a12, a2, 28
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|     s32i    a13, a2, 32
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|     s32i    a14, a2, 36
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|     s32i    a15, a2, 40
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| 
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|     /* do some work with a2 - a15 */
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|     l32i    a5, a2, 44 /* a5 <- in[0] */
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|     l32i    a6, a2, 48 /* a6 <- in[1] */
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|     l32i    a7, a2, 52 /* a7 <- in[2] */
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| 
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|     or      a8, a5, a6
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|     or      a8, a8, a7
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| 
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|     add     a9, a5, a6
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|     add     a9, a9, a7
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| 
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|     mov     a10, a7
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| 
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|     rsr     a11, PS
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|     s32i    a8,  a2, 56  /* a8 -> out[0] */
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|     s32i    a9,  a2, 60  /* a9 -> out[1] */
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|     s32i    a10, a2, 64 /* a10 -> out[2] */
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|     s32i    a11, a2, 68 /* a11 -> out[3] */
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| 
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|     /* restore all saved registers (regs[11] -> a5-a15) */
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|     l32i    a5,  a2, 0
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|     l32i    a6,  a2, 4
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|     l32i    a7,  a2, 8
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|     l32i    a8,  a2, 12
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|     l32i    a9,  a2, 16
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|     l32i    a10, a2, 20
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|     l32i    a11, a2, 24
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|     l32i    a12, a2, 28
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|     l32i    a13, a2, 32
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|     l32i    a14, a2, 36
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|     l32i    a15, a2, 40
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|     ret
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