Zhou Xiao 85f30552a2 feat(phy): ESP32-C5 ECO2/ECO3 coex and ESP32-C6 track reset ...

* C5 phy_version: 1 107, 8c534c84, Nov 17 2025
* C6 phy_version: 343, b513b46, Nov 14 2025

2025-11-17 15:39:15 +08:00

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esp32

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esp32c2

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esp32c3

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esp32c5

refactor(esp_phy): refactor phy sleep data initialize, split it to support multiple targets

2025-01-26 14:54:33 +08:00

esp32c6

refactor(esp_phy): refactor phy sleep data initialize, split it to support multiple targets

2025-01-26 14:54:33 +08:00

esp32c61

refactor(esp_phy): refactor phy sleep data initialize, split it to support multiple targets

2025-01-26 14:54:33 +08:00

esp32h2/include

fix(ble): fix btbb retention register size on esp32c61

2024-11-28 11:34:50 +08:00

esp32h4/include

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esp32s2

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esp32s3

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include

feat(phy): update 11ax rate for cert test

2025-08-22 19:21:00 +08:00

lib @ fbc304747b

feat(phy): ESP32-C5 ECO2/ECO3 coex and ESP32-C6 track reset

2025-11-17 15:39:15 +08:00

src

fix(esp_phy): Add protection of consecutive disable operations by single modem source

2025-08-15 07:21:09 +08:00

test

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CMakeLists.txt

fix(ci): fix some ci build issues to pass ci pipeline

2025-01-26 14:54:33 +08:00

Kconfig

feat(phy): add a config for pll track feature

2025-07-03 14:56:12 +08:00

linker.lf

fix(phy): fix esp32c2 build issue

2025-08-01 12:05:59 +08:00

sdkconfig.rename

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