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a5e647cf7fecc848b5526e26d6ed9865ff7a8077
esp-idf/components/riscv
History
Sudeep Mohanty d4ca7c246e fix(freertos): Fixed incorrect int level restoration on esp32p4
This commit fixes a bug where in the portENABLE_INTERRUPTS() macro
incorrectly restored the interrupt level to 1 (non-CLIC controller).
2024-01-05 11:00:56 +01:00
..
include
fix(freertos): Fixed incorrect int level restoration on esp32p4
2024-01-05 11:00:56 +01:00
CMakeLists.txt
fix(esp32p4): Fixed interrupt handling to use the CLIC controller
2023-08-31 12:16:08 +08:00
instruction_decode.c
interrupt: filter out reserved int number by decoding risc-v JAL instruction
2021-01-05 15:39:46 +08:00
interrupt.c
fix(esp32p4): Fixed interrupt handling to use the CLIC controller
2023-08-31 12:16:08 +08:00
linker.lf
riscv: moved some interrupt functions from IRAM to flash
2023-04-10 12:21:11 +08:00
project_include.cmake
build: Adds support for universal Clang toolchain
2022-11-23 13:25:16 +03:00
vectors_clic.S
feat(esp_system): Support IPC_ISR for ESP32P4
2023-09-15 23:38:12 +08:00
vectors_intc.S
fix(esp32p4): Fixed interrupt handling to use the CLIC controller
2023-08-31 12:16:08 +08:00
vectors.S
fix(riscv): fix a bug in FPU exception handling
2023-11-14 06:55:08 +00:00
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