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70 lines
2.7 KiB
C
70 lines
2.7 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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/* SPI commands (actual on-wire commands not SPI controller bitmasks)
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Suitable for use with spi_flash_hal_common_command static function.
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*/
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#define CMD_RDID 0x9F
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#define CMD_WRSR 0x01
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#define SR_WIP (1<<0) /* Status register write-in-progress bit */
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#define SR_WREN (1<<1) /* Status register write enable bit */
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#define CMD_WRSR2 0x31 /* Not all SPI flash uses this command */
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#define CMD_WREN 0x06
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#define CMD_WRDI 0x04
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#define CMD_RDSR 0x05
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#define CMD_RDSR2 0x35 /* Not all SPI flash uses this command */
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#define CMD_RDSCUR 0x2B /* on specific(MXIC) board, read security register */
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#define CMD_RDFR 0x48 /* on specific(ISSI) board, read function register */
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#define CMD_FASTRD_QIO 0xEB
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#define CMD_FASTRD_QIO_4B 0xEC
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#define CMD_FASTRD_QUAD 0x6B
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#define CMD_FASTRD_QUAD_4B 0x6C
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#define CMD_FASTRD_DIO 0xBB
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#define CMD_FASTRD_DIO_4B 0xBC
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#define CMD_FASTRD_DUAL 0x3B
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#define CMD_FASTRD_DUAL_4B 0x3C
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#define CMD_FASTRD 0x0B
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#define CMD_FASTRD_4B 0x0C
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#define CMD_READ 0x03 /* Speed limited */
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#define CMD_READ_4B 0x13 /* Speed limited */
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#define CMD_CHIP_ERASE 0xC7
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#define CMD_SECTOR_ERASE 0x20
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#define CMD_SECTOR_ERASE_4B 0x21
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#define CMD_LARGE_BLOCK_ERASE 0xD8 /* 64KB block erase command */
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#define CMD_LARGE_BLOCK_ERASE_4B 0xDC /* 64KB block erase command */
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#define CMD_PROGRAM_PAGE 0x02
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#define CMD_PROGRAM_PAGE_4B 0x12
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#define CMD_SUSPEND 0x75
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#define CMD_RESUME 0x7A
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#define CMD_RST_EN 0x66
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#define CMD_RST_DEV 0x99
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#define SPI_FLASH_DIO_ADDR_BITLEN 24
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#define SPI_FLASH_DIO_DUMMY_BITLEN 4
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#define SPI_FLASH_QIO_ADDR_BITLEN 24
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#define SPI_FLASH_QIO_DUMMY_BITLEN 6
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#define SPI_FLASH_QOUT_ADDR_BITLEN 24
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#define SPI_FLASH_QOUT_DUMMY_BITLEN 8
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#define SPI_FLASH_DOUT_ADDR_BITLEN 24
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#define SPI_FLASH_DOUT_DUMMY_BITLEN 8
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#define SPI_FLASH_FASTRD_ADDR_BITLEN 24
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#define SPI_FLASH_FASTRD_DUMMY_BITLEN 8
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#define SPI_FLASH_SLOWRD_ADDR_BITLEN 24
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#define SPI_FLASH_SLOWRD_DUMMY_BITLEN 0
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