Jiang Jiang Jian b25bf99d4f Merge branch 'feat/spi_std_timing_and_bit_trans_v5.1' into 'release/v5.1' ...

feat(driver_spi): support adjust master rx to standard timing (v5.1)

See merge request espressif/esp-idf!36402

2025-01-24 15:11:09 +08:00

..

include/hal

Merge branch 'feat/spi_std_timing_and_bit_trans_v5.1' into 'release/v5.1'

2025-01-24 15:11:09 +08:00

clk_tree_hal.c

…

efuse_hal.c

Merge branch 'bugfix/update_esp32c6eco1_sleep_fosc_cal_cycles_backport_v5.1' into 'release/v5.1'

2023-05-18 19:52:05 +08:00

modem_clock_hal.c

fix(esp_hw_support): re-initialize icg map in modem_clock_module_enable

2023-12-08 14:22:36 +08:00

pau_hal.c

feat(pm): support PMU trigger regdma when PU TOP

2024-01-16 14:01:22 +08:00

pmu_hal.c

change(pm): put pmu_hal to iram

2024-01-16 14:01:22 +08:00