Jiang Jiang Jian b25bf99d4f Merge branch 'feat/spi_std_timing_and_bit_trans_v5.1' into 'release/v5.1' ...

feat(driver_spi): support adjust master rx to standard timing (v5.1)

See merge request espressif/esp-idf!36402

2025-01-24 15:11:09 +08:00

..

include

Merge branch 'feat/spi_std_timing_and_bit_trans_v5.1' into 'release/v5.1'

2025-01-24 15:11:09 +08:00

ld

fix(soc): Fixed ECDSA register compatibility

2025-01-24 09:13:35 +05:30

adc_periph.c

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ana_cmpr_periph.c

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dedic_gpio_periph.c

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gdma_periph.c

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gpio_periph.c

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i2c_periph.c

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i2s_periph.c

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ieee802154_periph.c

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interrupts.c

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ledc_periph.c

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mcpwm_periph.c

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parlio_periph.c

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pcnt_periph.c

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rmt_periph.c

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rtc_io_periph.c

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sdm_periph.c

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spi_periph.c

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temperature_sensor_periph.c

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timer_periph.c

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twai_periph.c

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uart_periph.c

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