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67 lines
2.1 KiB
C
67 lines
2.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_err.h"
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#include "sdkconfig.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define PSRAM_SIZE_2MB (2 * 1024 * 1024)
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#define PSRAM_SIZE_4MB (4 * 1024 * 1024)
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#define PSRAM_SIZE_8MB (8 * 1024 * 1024)
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#define PSRAM_SIZE_16MB (16 * 1024 * 1024)
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#define PSRAM_SIZE_32MB (32 * 1024 * 1024)
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/*
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See the TRM, chapter PID/MPU/MMU, header 'External RAM' for the definitions of these modes.
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Important is that NORMAL works with the app CPU cache disabled, but gives huge cache coherency
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issues when both app and pro CPU are enabled. LOWHIGH and EVENODD do not have these coherency
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issues but cannot be used when the app CPU cache is disabled.
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*/
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typedef enum {
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PSRAM_VADDR_MODE_NORMAL=0, ///< App and pro CPU use their own flash cache for external RAM access
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PSRAM_VADDR_MODE_LOWHIGH, ///< App and pro CPU share external RAM caches: pro CPU has low 2M, app CPU has high 2M
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PSRAM_VADDR_MODE_EVENODD, ///< App and pro CPU share external RAM caches: pro CPU does even 32yte ranges, app does odd ones.
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} psram_vaddr_mode_t;
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/**
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* @brief To get the physical psram size in bytes.
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*
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* @param[out] out_size_bytes physical psram size in bytes.
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*/
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esp_err_t esp_psram_impl_get_physical_size(uint32_t *out_size_bytes);
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/**
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* @brief To get the available physical psram size in bytes.
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*
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* @param[out] out_size_bytes availabe physical psram size in bytes.
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*/
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esp_err_t esp_psram_impl_get_available_size(uint32_t *out_size_bytes);
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/**
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* @brief Enable psram and configure it to a ready state
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*
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* @param vaddrmode Mode the psram cache works in.
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* @return
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* - ESP_OK: On success
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* - ESP_ERR_NOT_SUPPORTED: PSRAM ID / vendor ID check fail
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* - ESP_ERR_INVALID_STATE: On esp32, when VSPI peripheral is needed but cannot be claimed
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*/
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esp_err_t esp_psram_impl_enable(psram_vaddr_mode_t vaddrmode);
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/**
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* @brief get psram CS IO
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*
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* @return psram CS IO
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*/
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uint8_t esp_psram_impl_get_cs_io(void);
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